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[bit3] UNDR (UNDeR flow flag)
This bit is a flag indicating that an underflow has occurred. The UNDR bit is cleared at reset
and when 0 is written to it. For a read by a read modify write instruction, 1 is always read.
Writing 1 to the UNDR has no effect.
[bit2] CLKS (clock select)
In the MB91319, always write 0 to this bit.
[bit1] UTST (U-TIMER STart)
This bit is the U-TIMER operation enable bit.
0: Stopped. Writing 0 during operation stops running of the U-TIMER. [initial value]
1: Writing 1 during operation does not stop the U-TIMER.
[bit0] UTCR (U-TIMER CleaR)
Writing 0 to UTCR clears the U-TIMER to 0000
The read value is always 1.
■ Precautions on the U-TIMER Control Register (UTIMC)
•
In the stop state, assert the start bit UTST (started) to automatically reload data.
•
In the stop state, assert both the clear bit UTCR and the start bit UTST at the same time to
clear the counter to 0 and generate an underflow in the count-down immediately after the
counter is cleared.
•
During operation, the clear bit UTCR is asserted to clear the counter to 0. As a result, a short,
whisker-like pulse may be output in the output waveform, possibly causing the UART to
malfunction. While the output clock is being used, do not clear it using the clear bit.
•
In the timer stop state, assert both bit1 (U-TIMER start bit: UTST) and bit0 (U-TIMER clear bit:
UTCR) of the U-TIMER control register at the same time to set bit3 (underflow flag: UNDR) of
this register when the counter is loaded after it has been cleared. At this timing, the internal
baud rate clock is set to level.
•
If the device attempts to set and clear the underflow flag at the same time, the flag is set and
the clear operation becomes ineffective.
•
Always write 0 to bit4 (UTIE) and bit0 (CLKS) of the U-TIMER control register (UTIMC).
•
If the device attempts to write to and reload the data into the U-TIMER reload register at the
same time, old data is loaded into the counter. New data is loaded into the counter only in the
next reload timing.
•
If the device attempts to clear and load T-TIMER at the same time, the timer clear operation
takes precedence.
CHAPTER 13 U-TIMER
(also clears the f.f. to 0).
H
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