Figure 342. Filter Bank Scale Configuration - Register Organization - ST STM32F405 Reference Manual

Controller area network (bxCAN)
Filter bank scale and mode configuration
The filter banks are configured by means of the corresponding CAN_FMR register. To
configure a filter bank it must be deactivated by clearing the FACT bit in the CAN_FAR
register. The filter scale is configured by means of the corresponding FSCx bit in the
CAN_FS1R register, refer to
corresponding Mask/Identifier registers is configured by means of the FBMx bits in the
CAN_FMR register.
To filter a group of identifiers, configure the Mask/Identifier registers in mask mode.
To select single identifiers, configure the Mask/Identifier registers in identifier list mode.
Filters not used by the application should be left deactivated.
Each filter within a filter bank is numbered (called the Filter Number) from 0 to a maximum
dependent on the mode and the scale of each of the filter banks.
Concerning the filter configuration, refer to
Mapping
Mapping
Mapping
Mapping
Filter match index
Once a message has been received in the FIFO it is available to the application. Typically,
application data is copied into SRAM locations. To copy the data to the right location the
1088/1749
Figure

Figure 342. Filter bank scale configuration - register organization

One 32-Bit Filter - Identifier Mask
ID
CAN_FxR1[31:24]
Mask
CAN_FxR2[31:24]
STID[10:3]
Two 32-Bit Filters - Identifier List
ID
CAN_FxR1[31:24]
ID
CAN_FxR2[31:24]
STID[10:3]
Two 16-Bit Filters - Identifier Mask
ID
CAN_FxR1[15:8]
Mask
CAN_FxR1[31:24]
ID
CAN_FxR2[15:8]
Mask
CAN_FxR2[31:24]
STID[10:3]
Four 16-Bit Filters - Identifier List
ID
CAN_FxR1[15:8]
ID
CAN_FxR1[31:24]
ID
CAN_FxR2[15:8]
ID
CAN_FxR2[31:24]
STID[10:3]
342. The identifier list or identifier mask mode for the
Figure 342.
CAN_FxR1[23:16] CAN_FxR1[15:8]
CAN_FxR2[23:16] CAN_FxR2[15:8]
STID[2:0] EXID[17:13]
CAN_FxR1[23:16] CAN_FxR1[15:8]
CAN_FxR2[23:16] CAN_FxR2[15:8]
STID[2:0] EXID[17:13]
CAN_FxR1[7:0]
CAN_FxR1[23:16]
CAN_FxR2[7:0]
CAN_FxR2[23:16]
STID[2:0] RTR IDE EXID[17:15]
CAN_FxR1[7:0]
CAN_FxR1[23:16]
CAN_FxR2[7:0]
CAN_FxR2[23:16]
STID[2:0] RTR IDE EXID[17:15]
x = filter bank number
ID=Identifier
1
These bits are located in the CAN_FS1R register
2
These bits are located in the CAN_FM1R register
RM0090 Rev 18
CAN_FxR1[7:0]
CAN_FxR2[7:0]
EXID[12:5] EXID[4:0] IDE
CAN_FxR1[7:0]
CAN_FxR2[7:0]
EXID[12:5]
EXID[4:0] IDE
RM0090
Filter
Num.
n
RTR 0
n
n+1
RTR 0
n
n+1
n
n+1
n+2
n+3