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M16C/64C Group
31.1.5
Flash Memory Electrical Characteristics
Table 31.8
CPU Clock When Operating Flash Memory (f
V
= 2.7 to 5.5 V, T
CC1
Symbol
-
CPU rewrite mode
f(SLOW_R)
Slow read mode
-
Low current consumption read mode
-
Data flash read
Notes:
1.
Set the PM17 bit in the PM1 register to 1 (one wait).
2.
When the frequency is over this value, set the FMR17 bit in the FMR1 register to 0 (one wait) or the PM17 bit in
the PM1 register to 1 (one wait)
3.
Set the PM17 bit in the PM1 register to 1 (one wait). When using 125 kHz on-chip oscillator clock or sub clock as
the CPU clock source, a wait is not necessary.
Table 31.9
Flash Memory (Program ROM 1, 2) Electrical Characteristics
V
= 2.7 to 5.5 V at T
CC1
Symbol
-
Program and erase cycles
-
2 word program time
-
Lock bit program time
-
Block erase time
Time delay from suspend request
t
d(SR-SUS)
until suspend
Interval from erase start/restart
-
until following suspend request
Suspend interval necessary for
-
auto-erasure to complete
Time from suspend until erase
-
restart
-
Program, erase voltage
-
Read voltage
-
Program, erase temperature
t
Flash memory circuit stabilization wait time
PS
-
Data hold time
Notes:
1.
Definition of program and erase cycles:
The program and erase cycles refer to the number of per-block erasures. If the program and erase cycles are n
(n = 1,000), each block can be erased n times. For example, if a block is erased after writing 2 word data 16,384
times, each to a different address, this counts as one program and erase cycles. Data cannot be written to the
same address more than once without erasing the block (rewrite prohibited).
2.
Cycles to guarantee all electrical characteristics after program and erase. (1 to Min. value can be guaranteed).
3.
In a system that executes multiple programming operations, the actual erasure count can be reduced by writing
to sequential addresses in turn so that as much of the block as possible is used up before performing an erase
operation. It is advisable to retain data on the erasure cycles of each block and limit the number of erase
operations to a certain number.
4.
If an error occurs during block erase, attempt to execute the clear status register command, then execute the
block erase command at least three times until the erase error does not occur.
5.
Customers desiring program/erase failure rate information should contact a Renesas Electronics sales office.
6.
The data hold time includes time that the power supply is off or the clock is not supplied.
7.
After an erase start or erase restart, if an interval of at least 20 ms is not set before the next suspend request, the
erase sequence cannot be completed.
R01UH0092EJ0110 Rev.1.10
Jul 31, 2012
= -20°C to 85°C/-40°C to 85°C unless otherwise specified.
opr
Parameter
= 0°C to 60°C (option: -40°C to 85°C), unless otherwise specified.
opr
Parameter
(1), (3), (4)
V
CC1
V
CC1
V
CC1
V
CC1
(7)
T
opr
(6)
Ambient temperature = 55°C
)
(BCLK)
Conditions
2.7 V ≤ V
≤ 3.0 V
CC1
≤ 5.5 V
3.0 V < V
CC1
Conditions
= 3.3 V, T
= 25°C
opr
= 3.3 V, T
= 25°C
opr
= 3.3 V, T
= 25°C
opr
= 3.3 V, T
= 25°C
opr
= -20°C to 85°C/-40°C to 85°C
31. Electrical Characteristics
Standard
Min.
Typ.
Max.
10
(3)
5
fC(32.768)
35
16
20
Standard
Min.
Typ.
Max.
(2)
1,000
150
4000
70
3000
0.2
3.0
5
+
--------------- -
f
(
0
20
30
+
--------------- -
f
(
2.7
5.5
2.7
5.5
0
60
50
20
Page 715 of 807
Unit
(1)
MHz
MHz
kHz
(2)
MHz
(2)
MHz
Unit
times
μs
μs
s
3
ms
)
BCLK
μs
ms
1
μs
)
BCLK
V
V
°C
μs
year
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