24. Serial Interface Si/O3 And Si/O4; Introduction - Renesas M16C/64C User Manual

M16C/64C Group

24. Serial Interface SI/O3 and SI/O4

24.1

Introduction

SI/O3 and SI/O4 are dedicated clock-synchronous serial I/O ports.
Table 24.1 lists SI/O3 and SI/O4 Specifications.
Figure 24.1 shows SI/O3 and SI/O4 Block Diagram, and Table 24.2 lists the I/O Ports.
Table 24.1 SI/O3 and SI/O4 Specifications
Item
Data format
Transmit/receive clocks
Transmission/reception start
condition
Interrupt request generation
timing
Selectable functions
i = 3, 4
Notes:
1. The data is shifted every time the external clock is input. When completing data
transmission/reception of the eighth bit, read or write to the SiTRR register before inputting the
clock for the next data transmission/reception.
2. When the SMi6 bit in the SiC register is 0 (external clock), follow the steps below.
•
When the SMi4 bit in the SiC register is 0, write transmit data to the SiTRR register while input to
the CLKi pin is high.
•
When the SMi4 bit is 1, write transmit data to the SiTRR register while input to the CLKi pin is low.
R01UH0092EJ0110 Rev.1.10
Jul 31, 2012
Character length: 8 bits
•
The SMi6 bit in the SiC register = 1 (internal clock):
fj
-------------------- -
( )
2 n + 1
fj = f1SIO, f2SIO, f8SIO, f32SIO
n = setting value of the SiBRG register
The SMi6 bit = 0 (external clock): Input from the CLKi pin
Before transmission/reception starts, write transmit data to the SiTRR
(2)
register.
•
The SMi4 bit in the SiC register = 0
The rising edge of the last transmit/receive clock
•
The SMi4 bit = 1
The falling edge of the last transmit/receive clock
•
CLK polarity selection
Whether data is input/output at the rising or falling edge of the
transmit/receive clock can be selected.
•
LSB first or MSB first selection
Whether to start transmitting/receiving data from bit 0 or from bit 7 can be
selected.
•
SOUTi initial value setting function
When the SMi6 bit in the SiC register = 0 (external clock), the SOUTi pin
output level while not transmitting can be selected.
•
SOUTi state selection after transmission
Whether to set to high-impedance or retain the last bit level can be
selected when the SMi6 bit in the SiC register is 1 (internal clock).
24. Serial Interface SI/O3 and SI/O4
Specification
00h to FFh
(1)
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