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M16C/64C Group
Table 23.25
Registers Used and Settings in SIM Mode
Register
(2)
0 to 7
U2TB
0 to 7
(2)
U2RB
OER, FER, PER, SUM Error flag
U2BRG
0 to 7
SMD2 to SMD0
CKDIR
STPS
U2MR
PRY
PRYE
IOPOL
CLK0, CLK1
CRS
TXEPT
U2C0
CRD
NCH
CKPOL
UFORM
TE
TI
RE
RI
U2C1
U2IRS
U2RRM
U2LCH
U2ERE
(2)
0 to 3
U2SMR
U2SMR2
0 to 7
U2SMR3
0 to 7
U2SMR4
0 to 7
Notes:
1.
This table does not describe a procedure.
2.
Set bits not listed above to 0 when writing to the registers in SIM mode.
R01UH0092EJ0110 Rev.1.10
Jul 31, 2012
Bit
Set transmit data.
Received data can be read.
Set a bit rate.
Set to 101b.
Select the internal clock or external clock.
Set to 0.
Set to 1 in direct format or 0 in inverted format.
Set to 1.
Set to 0.
Select the count source for the U2BRG register.
Disabled because CRD is 1.
Transmit register empty flag
Set to 1.
Set to 0.
Set to 0.
Set to 0 in direct format or 1 in inverted format.
Set to 1 to enable transmission.
Transmit buffer empty flag
Set to 1 to enable reception.
Reception complete flag
Set to 1.
Set to 0.
Set to 0 in direct format or 1 in inverted format.
Set to 1.
Set to 0.
Set to 0.
Set to 0.
Set to 0.
23. Serial Interface UARTi (i = 0 to 2, 5 to 7)
(1)
Function
Page 510 of 807
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