I2C0 Status Register 0 (S10) - Renesas M16C/64C User Manual

M16C/64C Group
25.2.9

I2C0 Status Register 0 (S10)

I2C0 Status Register 0
b7 b6 b5 b4 b3 b2 b1
Do not use the bit managing instruction (read-modify-write instruction) to access the S10 register. Use
the MOV instruction to write to the S10 register.
Bit 5 to bit 0 in the S10 register (6 lower bits) monitor the state of the I
cannot be changed by a program. However, writing to the S10 register, including the 6 lower bits,
generates a start/stop condition.
Bits MST and TRX are read and write bits. To change bits MST or TRX without generating a start/stop
condition, set 1111b to the 4 lower bits in the S10 register.
R01UH0092EJ0110 Rev.1.10
Jul 31, 2012
Symbol
b0
S10
Bit Symbol Bit Name
LRB Last receive bit
ADR0 General call detect flag
AAS Slave address compare flag
AL Arbitration lost detect flag
2
I C-bus interface interrupt
PIN
request bit
BB Bus busy flag
Communication mode select
TRX
bit 0
Communication mode select
MST
bit 1
25. Multi-master I
Address
02B8h
Function
When read,
0: Last bit = 0
1: Last bit = 1
When write, see Table 25.10 "Functions
Enabled by Writing to the S10 Register"
When read,
0: Not detected
1: Detected
When write, see Table 25.10 "Functions
Enabled by Writing to the S10 Register"
When read,
0: Address not matched
1: Address matched
When write, see Table 25.10 "Functions
Enabled by Writing to the S10 Register"
When read,
0: Not detected
1: Detected
When write, see Table 25.10 "Functions
Enabled by Writing to the S10 Register"
When read,
0: Interrupt requested
1: Interrupt not requested
When write, see Table 25.10 "Functions
Enabled by Writing to the S10 Register"
When read,
0: Bus free
1: Bus busy
When write, see Table 25.10 "Functions
Enabled by Writing to the S10 Register"
0: Receive mode
1: Transmit mode
0: Slave mode
1: Master mode
2
2
C-bus Interface
Reset Value
0001 000Xb
RW
RW
RW
RW
RW
RW
RW
RW
RW
C interface. The bit values
Page 552 of 807