A/D Control Register 2 (Adcon2) - Renesas M16C/64C User Manual

M16C/64C Group
27.2.4

A/D Control Register 2 (ADCON2)

A/D Control Register 2
b7 b6 b5 b4 b3 b2
0 0
If the ADCON2 register is rewritten during A/D conversion, the conversion result is undefined.
ADGSEL1-ADGSEL0 (A/D input group select bit) (b2-b1)
Pins AN0_0 to AN0_7 are used as analog input pins even if bits PM01 to PM00 in the PM0 register are
set to 01b (memory expansion mode) and bits PM05 to PM04 are 11b (multiplexed bus is allocated to
the entire CS space).
R01UH0092EJ0110 Rev.1.10
Jul 31, 2012
b1 b0
Symbol
ADCON2
Bit Symbol Bit Name
—
No register bit. If necessary, set to 0. The read value is undefined.
(b0)
ADGSEL0
A/D input group select bit
ADGSEL1
—
No register bit. If necessary, set to 0. The read value is undefined.
(b3)
Frequency select bit 2
CKS2
—
Reserved bits
(b7-b5)
Address
03D4h
Function
b2 b1
0 0 : AN0 to AN7
0 1 : Do not set
1 0 : AN0_0 to AN0_7
1 1 : AN2_0 to AN2_7
Refer to the CKS0 bit in the ADCON0
register.
Set to 0
27. A/D Converter
Reset Value
0000 X00Xb
RW
—
RW
RW
—
RW
RW
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