Port Pi Register (Pi) (I = 0 To 10) - Renesas M16C/64C User Manual

M16C/64C Group
13.3.5

Port Pi Register (Pi) (i = 0 to 10)

Port Pi Register (i = 0 to 10)
b7 b6 b5 b4 b3 b2 b1
Data input/output to and from external devices is accomplished by reading and writing to the Pi register.
Each bit in the Pi register consists of a port latch to hold the output data and a circuit to read the pin
status.
For ports set to input mode, the input level of the pin can be read by reading the corresponding Pi
register, and data can be written to the port latch by writing to the Pi register.
For ports set to output mode, the port latch can be read by reading the corresponding Pi register, and
data can be written to the port latch by writing to the Pi register. The data written to the port latch is
output from the pin. Each bit in the Pi register corresponds to one port.
In memory expansion and microprocessor modes, the Pi register for the pins functioning as bus control
pins (A0 to A19, D0 to D15, CS0 to CS3 , RD , WRL / WR , WRH / BHE , ALE, RDY , HOLD , HLDA , and
BCLK) cannot be modified (writing a value has no effect).
Since P7_0, P7_1, and P8_5 are N-channel open drain ports, when set to 1, the pin status becomes
high-impedance.
When the CM04 bit in the CM0 register is 1 (XCIN-XCOUT oscillation function) and bits PD8_6 and
PD8_7 in the PD8 register are 0 (input mode), values of bits P8_6 and P8_7 in the P8 register are
undefined.
R01UH0092EJ0110 Rev.1.10
Jul 31, 2012
Symbol
b0
P0 to P3
P4 to P7
P8 to P10
Bit Symbol Bit Name
Pi_0 Port Pi_0 bit
Pi_1 Port Pi_1 bit
Pi_2 Port Pi_2 bit
Pi_3 Port Pi_3 bit
Pi_4 Port Pi_4 bit
Pi_5 Port Pi_5 bit
Pi_6 Port Pi_6 bit
Pi_7 Port Pi_7 bit
Address
03E0h, 03E1h, 03E4h, 03E5h
03E8h, 03E9h, 03ECh, 03EDh
03F0h, 03F1h, 03F4h
Function
The pin level of any I/O port which is set
to input mode can be read by reading the
corresponding bit in this register.
The pin level of any I/O port which is set
to output mode can be controlled by
writing to the corresponding bit in this
register.
0 : Low level
1 : High level
13. Programmable I/O Ports
Reset Value
XXh
XXh
XXh
RW
RW
RW
RW
RW
RW
RW
RW
RW
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