Renesas M16C/64C User Manual page 694

M16C/64C Group
FMR01 (CPU rewrite mode select bit) (b1)
Commands can be accepted by setting the FMR01 bit to 1 (CPU rewrite mode enabled).
To set the FMR01 bit to 1, write 0 and then 1 in succession. Do not generate any interrupts or DMA
transfers between setting 0 and 1.
Change the FMR01 bit when the PM24 bit in the PM2 register is 0 ( NMI interrupt disabled) or high is
input to the NMI pin.
While in EW0 mode, write to this bit from a program in an area other than flash memory.
Enter read array mode, and then set this bit to 0.
FMR02 (Lock bit disable select bit) (b2)
The lock bit is disabled by setting the FMR02 bit to 1 (lock bit disabled) (Refer to 30.8.4 "Data Protect
Function").
The FMR02 bit does not change the lock bit data, but disables the lock bit function. If an erase
command is executed when the FMR02 bit is set to 1, the lock bit data status changes from 0 (locked)
to 1 (unlocked) after command execution is completed.
To set the FMR02 bit to 1, write 0 and then 1 to the FMR02 bit in succession when the FMR01 bit is 1.
Make sure no interrupts or DMA transfers will occur before writing 1 after writing 0.
Do not change the FMR02 bit while programming, erasing or suspending.
FMSTP (Flash memory stop bit) (b3)
The FMSTP bit resets the flash memory control circuits and minimizes current consumption in the flash
memory. Access to the internal flash memory is disabled when the FMSTP bit is set to 1 (flash memory
operation stopped). Set the FMSTP bit by a program located in an area other than the flash memory.
Set the FMSTP bit to 1 under the following condition:
• A flash memory access error occurs while erasing or programming in EW0 mode (the FMR00 bit
does not revert to 1 (ready)).
After the FMSTP bit is set to 0 (Flash memory operation enabled), wait until the flash memory circuit
stabilizes (tps), then perform the next operation.
Also when the FMSTP bit is set to 0 immediately after this bit is set to 1, wait for tps after the bit is set
to 1. The procedure for this case is described below.
(1) Set the FMSTP bit to 1.
(2) Wait until the flash memory circuit stabilizes (tps).
(3) Set the FMSTP bit to 0.
(4) Wait for tps.
The FMSTP bit is enabled when the FMR01 bit is 1 (CPU rewrite mode). When the FMR01 bit is 0,
although the FMSTP bit can be set to 1 by writing 1, the flash memory is neither placed in low-power
mode nor initialized.
When the FMR22 bit is 1 (slow read mode enabled) or the FMR23 bit is 1 (low-current consumption
read mode enabled), do not set the FMSTP bit in the FMR0 register to 1 (flash memory operation
stopped). Also, when the FMSTP bit is 1, do not set the FMR22 or FMR23 bit to 1.
R01UH0092EJ0110 Rev.1.10
Jul 31, 2012
30. Flash Memory
Page 661 of 807