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M16C/64C Group
Table 25.17
Registers Associated with I
Address
I2C-bus Interface Interrupt Control
007Bh
Register
007Ch
SCL/SDA Interrupt Control Register
0206h
Interrupt Source Select Register 2
When using the I
interrupt). When using the SCL/SDA interrupt, set the IFSR23 bit in the IFSR2A register to 1 (SCL/SDA
interrupt).
The SCL/SDA interrupt is enabled even in wait mode and stop mode.
The IR bit in the SCLDAIC register may become 1 (interrupt requested) when the ES0 bit in the S1D0
register, the SIP bit in the S2D0 register, or the SIS bit in the S2D0 register is changed. Therefore, follow
the procedure below to change these bits. Refer to 14.13 "Notes on Interrupts".
(1) Set bits ILVL2 to ILVL0 in the SCLDAIC register to 000b (interrupt disabled).
(2) Set the ES0 bit in the S1D0 register and bits SIP and SIS in the S2D0 register.
(3) Set the IR bit in the SCLDAIC register to 0 (no interrupt request).
R01UH0092EJ0110 Rev.1.10
Jul 31, 2012
Register
2
C-bus interface interrupt, set the IFSR22 bit in the IFSR2A register to 1 (I
2
C Interface Interrupts
Symbol
IICIC
SCLDAIC
IFSR2A
2
25. Multi-master I
C-bus Interface
Reset Value
XXXX X000b
XXXX X000b
00h
Page 580 of 807
2
C-bus
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