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32.19
32.19.1
Limitation on CPU Clock .................................................................................................. 794
32.19.2
Register Access ............................................................................................................... 794
32.19.3
Low/High-level Input Voltage and Low-level Output Voltage ........................................... 794
32.20
Notes on CEC........................................................................................................................... 795
32.20.1
Registers and Bit Operation ............................................................................................ 795
32.20.2
VIH of the CEC pin .......................................................................................................... 795
32.21
Notes on A/D Converter........................................................................................................... 796
32.21.1
Analog Input Voltage ....................................................................................................... 796
32.21.2
Analog Input Pin .............................................................................................................. 796
32.21.3
Pin Configuration ............................................................................................................. 796
32.21.4
Register Access .............................................................................................................. 796
32.21.5
A/D Conversion Start ....................................................................................................... 796
32.21.6
A/D Operation Mode Change .......................................................................................... 796
32.21.7
State When Forcibly Terminated ...................................................................................... 797
32.21.8
A/D Open-Circuit Detection Assist Function .................................................................... 797
32.21.9
Detecting Completion of A/D Conversion ........................................................................ 797
32.22
Notes on D/A Converter............................................................................................................ 798
32.22.1
When Not Using the D/A Converter ................................................................................. 798
32.23
Notes on Flash Memory........................................................................................................... 799
32.23.1
OFS1 Address and ID Code Storage Address ................................................................ 799
32.23.2
Reading Data Flash ......................................................................................................... 799
32.23.3
CPU Rewrite Mode .......................................................................................................... 800
32.23.4
User Boot ......................................................................................................................... 802
Appendix 1. Package Dimensions.................................................................................... 803
Appendix 2. Differences between M16C/64A and M16C/64C ......................................... 804
REGISTER INDEX .......................................................................................................... 805
2
C-bus Interface .................................................................................. 794
A - 19
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