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7.4.3
Voltage Detector 1 ............................................................................................................. 76
7.4.4
Voltage Detector 2 ............................................................................................................. 79
7.5
Interrupts..................................................................................................................................... 82
8.
Clock Generator......................................................................................................... 83
8.1
Introduction ................................................................................................................................. 83
8.2
Registers..................................................................................................................................... 85
8.2.1
Processor Mode Register 0 (PM0) .................................................................................... 86
8.2.2
System Clock Control Register 0 (CM0) ............................................................................ 87
8.2.3
System Clock Control Register 1 (CM1) ............................................................................ 89
8.2.4
Oscillation Stop Detection Register (CM2) ........................................................................ 91
8.2.5
Peripheral Clock Select Register (PCLKR) ....................................................................... 93
8.2.6
Peripheral Clock Stop Register 1 (PCLKSTP1) ................................................................. 93
8.2.7
PLL Control Register 0 (PLC0) .......................................................................................... 95
8.2.8
Processor Mode Register 2 (PM2) .................................................................................... 96
8.3
Clocks Generated by Clock Generators ..................................................................................... 97
8.3.1
Main Clock ......................................................................................................................... 97
8.3.2
PLL Clock .......................................................................................................................... 98
8.3.3
125 kHz On-Chip Oscillator Clock (fOCO-S) ..................................................................... 98
8.3.4
Sub Clock (fC) ................................................................................................................... 99
8.4
CPU Clock and Peripheral Function Clocks ............................................................................. 100
8.4.1
CPU Clock and BCLK ...................................................................................................... 100
8.4.2
Peripheral Function Clocks (f1, fOCO-S, fC32, fC, Main Clock) ..................................... 100
8.5
Clock Output Function .............................................................................................................. 102
8.6
System Clock Protection Function............................................................................................ 102
8.7
Oscillator Stop/Restart Detect Function.................................................................................... 103
8.7.1
Operation When CM27 Bit is 0 (Oscillator Stop Detect Reset) ........................................ 103
8.7.2
Operation When CM27 Bit is 1 (Oscillator Stop/Restart Detect Interrupt) ....................... 104
8.7.3
Using the Oscillator Stop/Restart Detect Function .......................................................... 105
8.8
Interrupt .................................................................................................................................... 105
8.9
Notes on Clock Generator ........................................................................................................ 106
8.9.1
Oscillator Using a Crystal or a Ceramic Resonator ......................................................... 106
8.9.2
Noise Countermeasure .................................................................................................... 107
8.9.3
CPU Clock ....................................................................................................................... 108
8.9.4
Oscillator Stop/Restart Detect Function ........................................................................... 108
8.9.5
PLL Frequency Synthesizer ............................................................................................ 109
9.
Power Control .......................................................................................................... 110
9.1
Introduction ................................................................................................................................110
9.2
Registers....................................................................................................................................110
9.2.1
Flash Memory Control Register 0 (FMR0) ........................................................................111
9.2.2
Flash Memory Control Register 2 (FMR2) ........................................................................112
A - 3
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