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25.1
Introduction ............................................................................................................................... 534
25.2
Registers Descriptions.............................................................................................................. 537
25.2.1
Peripheral Clock Select Register (PCLKR) ..................................................................... 538
25.2.2
I2C0 Data Shift Register (S00) ........................................................................................ 539
25.2.3
I2C0 Address Register i (S0Di) (i = 0 to 2) ...................................................................... 540
25.2.4
I2C0 Control Register 0 (S1D0) ....................................................................................... 541
25.2.5
I2C0 Clock Control Register (S20) .................................................................................. 543
25.2.6
I2C0 Start/Stop Condition Control Register (S2D0) ......................................................... 545
25.2.7
I2C0 Control Register 1 (S3D0) ....................................................................................... 546
25.2.8
I2C0 Control Register 2 (S4D0) ....................................................................................... 550
25.2.9
I2C0 Status Register 0 (S10) ........................................................................................... 552
25.2.10
I2C0 Status Register 1 (S11) ........................................................................................... 557
25.3
Operations ................................................................................................................................ 558
25.3.1
Clock ................................................................................................................................ 558
25.3.2
Generating a Start Condition ........................................................................................... 561
25.3.3
Generating a Stop Condition ........................................................................................... 563
25.3.4
Generating a Restart Condition ....................................................................................... 564
25.3.5
Start Condition Overlap Protect ....................................................................................... 565
25.3.6
Arbitration Lost ................................................................................................................ 567
25.3.7
Detecting Start/Stop Conditions ....................................................................................... 569
25.3.8
Operation after Transmitting/Receiving a Slave Address or Data ................................... 571
25.3.9
Timeout Detection ........................................................................................................... 572
25.3.10
Data Transmit/Receive Examples ................................................................................... 573
25.4
Interrupts................................................................................................................................... 578
25.5
25.5.1
Limitation on CPU Clock .................................................................................................. 581
25.5.2
Register Access ............................................................................................................... 581
25.5.3
Low/High-level Input Voltage and Low-level Output Voltage ........................................... 581
26. Consumer Electronics Control (CEC) Function ....................................................... 582
26.1
Introduction ............................................................................................................................... 582
26.2
Registers................................................................................................................................... 585
26.2.1
CEC Function Control Register 1 (CECC1) ..................................................................... 585
26.2.2
CEC Function Control Register 2 (CECC2) ..................................................................... 586
26.2.3
CEC Function Control Register 3 (CECC3) ..................................................................... 588
26.2.4
CEC Function Control Register 4 (CECC4) ..................................................................... 590
26.2.5
CEC Flag Register (CECFLG) ......................................................................................... 592
26.2.6
CEC Interrupt Source Select Register (CISEL) ............................................................... 593
26.2.7
CEC Transmit Buffer Register 1 (CCTB1) ....................................................................... 594
26.2.8
CEC Transmit Buffer Register 2 (CCTB2) ....................................................................... 594
2
C-bus Interface................................................................................. 534
2
C-bus Interface .................................................................................. 581
A - 13
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