Real-Time Clock Hour Compare Data Register (Rtcchr) - Renesas M16C/64C User Manual

M16C/64C Group

20.2.10 Real-Time Clock Hour Compare Data Register (RTCCHR)

Real-Time Clock Hour Compare Data Register
b7 b6 b5 b4 b3 b2 b1
The RTCCHR register is enabled when bits RTCCMP1 to RTCCMP0 in the RTCCR2 register are 01b,
10b, or 11b (any compare mode).
HCMP03-HCMP00 (First digit of hour compare data bit) (b3-b0)
HCMP11-HCMP10 (Second digit of hour compare data bit) (b5-b4)
When the H12H24 bit in the RTCCR1 register is 0 (12-hour mode), set a value between 00 and 11 by
the BCD codes. When the H12H24 bit in the RTCCR1 register is 1 (24-hour mode), set a value
between 00 and 23 by the BCD codes.
Write to these bits when the BSY bit in the RTCSEC register is 0 (not while data is updated).
PMCMP (a.m./p.m compare bit) (b6)
This bit is enabled when the H12H24 bit in the RTCCR1 register is either 0 (12-hour mode) or 1 (24-
hour mode). When the H12H24 bit is 1, set the following:
•
When bits HCMP11 to HCMP10 and HCMP03 to HCMP00 are 00 to 11, set the PMCMP bit to 0.
•
When bits HCMP11 to HCMP10 and HCMP03 to HCMP00 are 12 to 23, set the PMCMP bit to 1.
Write to this bit when the BSY bit in the RTCSEC register is 0 (not while data is updated).
R01UH0092EJ0110 Rev.1.10
Jul 31, 2012
Symbol
b0
RTCCHR
Bit Symbol
HCMP00
HCMP01
First digit of hour compare data bit
HCMP02
HCMP03
HCMP10
Second digit of hour compare data bit
HCMP11
PMCMP a.m./p.m. compare bit
—
No register bit. If necessary, set to 0. The read value is undefined.
(b7)
Address
034Ah
Bit Name
Store compare data
Store compare data
0 : a.m.
1 : p.m.
20. Real-Time Clock
Reset Value
X000 0000b
Setting
Function RW
Range
RW
RW
0 to 9
RW
RW
RW
0 to 2
RW
RW
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