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M16C/64C Group
22.2.11 PMC0 Receive Data Store Register i (PMC0DATi) (i = 0 to 5)
PMC0 Receive Data Store Register i (i = 0 to 5)
b7
When detecting data 0 or data 1, the result is stored bit by bit according to the PMC0RBIT register
setting. The data is stored to the PMC0DATi register starting from bit 0 in the PMC0DAT0 register. Table
22.8 lists Order of Storing Data.
When the data exceeds 48 bits, the PMC0DATi register is sequentially overwritten from the first bit in
the PMC0DAT0 register. Also, after the DRFLG bit in the PMCiSTS register changes from 0 to 1 (next
frame reception starts), the PMC0DATi register is sequentially overwritten from the first bit in the
PMC0DAT0 register.
The header and special data are not stored.
When the EN bit in the PMCiCON0 register is 0 (PMCi operation disabled), the PMC0DATi register
becomes 00h.
Table 22.8
Order of Storing Data
Register
PMC0DAT0
PMC0DAT1
PMC0DAT2
PMC0DAT3
PMC0DAT4
PMC0DAT5
R01UH0092EJ0110 Rev.1.10
Jul 31, 2012
b0
Symbol
PMC0DAT0
PMC0DAT1
PMC0DAT2
PMC0DAT3
PMC0DAT4
PMC0DAT5
Received data is stored.
b7
b6
b5
8
7
6
16
15
14
24
23
22
32
31
30
40
39
38
48
47
46
22. Remote Control Signal Receiver
Address
D08Ch
D08Dh
D08Eh
D08Fh
D090h
D091h
Function
b4
b3
b2
5
4
3
13
12
11
21
20
19
29
28
27
37
36
35
45
44
43
Reset Value
00h
00h
00h
00h
00h
00h
RW
RO
b1
b0
2
1
10
9
18
17
26
25
34
33
42
41
Page 422 of 807
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