Interrupts - Renesas M16C/64C User Manual

M16C/64C Group
16.4

Interrupts

Refer to operation examples for interrupt request generation timing.
For details on interrupt control, refer to 14.7 "Interrupt Control".
Table 16.11 DMAC Interrupt Related Registers
Address
004Bh DMA0 Interrupt Control Register
004Ch DMA1 Interrupt Control Register
0069h DMA2 Interrupt Control Register
006Ah DMA3 Interrupt Control Register
When the DMS bit or bits DSEL4 to DSEL0 in the DMiSL register are changed, the DMAS bit in the
DMiCON sometimes becomes 1 (DMA requested) (i = 0 to 3). Therefore, set the DMAS bit to 0 (DMA not
requested) after the DMS bit or bits DSEL4 to DSEL0 in the DMiSL register are changed. Refer to 14.13
"Notes on Interrupts" for more details.
R01UH0092EJ0110 Rev.1.10
Jul 31, 2012
Register Symbol Reset Value
DM0IC XXXX X000b
DM1IC XXXX X000b
DM2IC XXXX X000b
DM3IC XXXX X000b
16. DMAC
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