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M16C/64C Group
Appendix 2. Differences between M16C/64A and M16C/64C
Appendix Table 2.1
Item
Enable/disable peripheral clock
provision
Timer A/timer B clock source
selection
Flash memory, suspend function
Electrical characteristics
Refer to the User's Manual: Hardware for details.
Appendix Table 2.2
Timing requirement
VCC1 = VCC2 = 5 V
Timing requirement
VCC1 = VCC2 = 3 V
Switching characteristics
VCC1 = VCC2 = 5 V
Switching characteristics
VCC1 = VCC2 = 3 V
Switching characteristic
Refer to the User's Manual: Hardware for details.
R01UH0092EJ0110 Rev.1.10
Jul 31, 2012
Differences between M16C/64A and M16C/64C (Specifications)
M16C/64A
N/A
f1 only
N/A
—
Differences between M16C/64A and M16C/64C (Bus Timing)
Item
tsu(DB-RD)
tsu(DB-RD)
th(WR-DB)
Minimum value
th(WR-AD)
Minimum value
th(WR-DB)
Minimum value
th(BCLK-DB)
Appendix 2. Differences between M16C/64A and M16C/64C
Available (bits PCKSTP1A and PCKSTP11
in the PCLKSTP1 register)
f1 or main clock (the PCKSTP17 bit in the
PCLKSTP1 register)
Available
Characteristics of voltage detector, power-on
reset circuit, and oscillator improved.
M16C/64A
Min. 40[ns]
Min. 50[ns]
9
×
0.5 10
[
--------------------- - 10 ns
–
f
(
)
BCLK
9
×
0.5 10
[
--------------------- - 10 ns
–
f
(
)
BCLK
9
×
0.5 10
[
--------------------- - 10 ns
–
f
(
)
BCLK
Min. 0[ns]
M16C/64C
M16C/64C
Min. 50[ns]
Min. 60[ns]
9
×
0.5 10
]
--------------------- - 20 ns
–
f
(
)
BCLK
9
×
0.5 10
]
--------------------- - 15 ns
–
f
(
)
BCLK
9
×
0.5 10
]
--------------------- - 25 ns
–
f
(
)
BCLK
(Standard not available)
Page 804 of 807
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