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M16C/64C Group
25.3.10.5 Slave Transmission
Slave transmission is described in this section. The initial settings described in 25.3.10.1 "Initial
Settings" are assumed to be completed. Figure 25.20 shows the example of slave transmission. The
following programs (A) to (B) are executed at (A) and (B) in Figure 25.20, respectively.
When arbitration lost is detected, the TRX bit becomes 0 (receive mode) even when the bit after the
slave address is 1 (read). Therefore, after arbitration lost is detected, read the S00 register. When the
bit 0 in the S00 register is 1, write 4Fh (slave transmit mode) to the S10 register and execute slave
transmission.
S: Start condition
P: Stop condition
S
SCLMM
SDAMM
IR bit in the
IICIC register
Figure 25.20 Example of Slave Transmission
(A) Start of slave transmission
2
(In I
C-bus interrupt routine)
(1) Check the value of the S10 register. When the TRX bit is 1, the I
mode.
(2) Write transmit data to the S00 register.
(B) Data transmission
2
(In I
C-bus interrupt routine)
(1) Write transmit data to the S00 register.
Write dummy data to the S00 register even if an interrupt occurs at an ACK clock of the last transmit
data. After writing to the S00 register, the SCLMM pin is released.
R01UH0092EJ0110 Rev.1.10
Jul 31, 2012
A: ACK
A: NACK
m
Slave address
A
R
(7 bits)
Set to 0 by interrupt request acceptance or by program
(A) Start of slave transmission
R: Read
m: Master outputs to SDA
W: Write
s: Slave outputs to SDA
s
m
Data
A
(8 bits)
(8 bits)
(B) Data transmission
2
25. Multi-master I
C-bus Interface
s
m
Data
A
P
Stop condition
2
C interface is in slave transmit
Page 577 of 807
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