Nmi/Sd Digital Filter Register (Nmidf) - Renesas M16C/64C User Manual

M16C/64C Group

NMI/SD Digital Filter Register (NMIDF)

13.3.7
NMI/SD Digital Filter Register
b7 b6 b5 b4 b3 b2 b1
Change the NMIDF register under the following conditions:
The PM24 bit in the PM2 register is 0 ( NMI interrupt disabled)
•
•
Bits INV02 and INV03 in the INVC0 register are 0 (three-phase motor control timer function not
used, three-phase motor control timer output disabled).
Once the PM24 bit is set to 1 ( NMI interrupt enabled), it cannot be set to 0 by a program. Change the
NMIDF register before setting the PM24 bit to 1.
R01UH0092EJ0110 Rev.1.10
Jul 31, 2012
b0
Symbol
NMIDF
Bit Symbol Bit Name
NMIDF0
NMI/SD filter sampling clock
NMIDF1
select bit
NMIDF2
—
No register bits. If necessary, set to 0. The read value is undefined.
(b7-b3)
Address
0369h
Function
b2 b1 b0
0 0 0 : No filter
0 0 1 : CPU clock divided by 2
0 1 0 : CPU clock divided by 4
0 1 1 : CPU clock divided by 8
1 0 0 : CPU clock divided by 16
1 0 1 : CPU clock divided by 32
1 1 0 : CPU clock divided by 64
1 1 1 : CPU clock divided by 128
13. Programmable I/O Ports
Reset Value
XXXX X000b
RW
RW
RW
RW
—
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