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M16C/64C Group
Table 11.8
Pin Functions for Each Processor Mode
Processor Mode
Bits PM05 to PM04
Data bus width
BYTE Pin
P0_0 to P0_7
P1_0 to P1_7
P2_0
P2_1 to P2_7
P3_0
P3_1 to P3_3
PM11 = 0
P3_4 to P3_7
PM11 = 1
PM06 = 0
P4_0 to P4_3
PM06 = 1
CS0 = 0
P4_4
CS0 = 1
CS1 = 0
P4_5
CS1 = 1
CS2 = 0
P4_6
CS2 = 1
CS3 = 0
P4_7
CS3 = 1
PM02 = 0
P5_0
PM02 = 1
PM02 = 0
P5_1
PM02 = 1
P5_2
P5_3
P5_4
P5_5
P5_6
P5_7
I/O port: Functions as I/O ports or peripheral function I/O pins.
PM11: Bit in the PM1 register
PM06, PM05 to PM04, PM02: Bits in the PM0 register
CS3 to CS0: Bits in the CSR register
Notes:
When setting bits PM05 and PM04 to 11b (multiplexed bus assigned to the entire CS space) while bits
1.
PM01 and PM00 are 01b (memory expansion mode), apply a high to the BYTE pin (external data bus 8
bits wide).
2.
While the CNVSS pin is driven high (= VCC1), do not set bits PM05 to PM04 to 11b.
3.
When bits PM05 to PM04 are set to 11b in memory expansion mode, P3_1 to P3_7 and P4_0 to P4_3
become I/O ports, in which case the accessible area for each CS is 256 bytes.
4.
In separate bus mode, these pins serve as the address bus.
When the data bus is 8 bits wide, set the PM02 bit to 0 ( RD , BHE , WR ).
5.
6.
When accessing an area using a multiplexed bus, these pins output an undefined value while writing.
7.
Do not use D8 to D15 with multiplexed bus.
R01UH0092EJ0110 Rev.1.10
Jul 31, 2012
Memory Expansion Mode or Microprocessor Mode
00b (separate bus)
8 bits
16 bits
High
Low
D0 to D7
D0 to D7
I/O ports
D8 to D15
A0
A0
A1 to A7
A1 to A7
A8
A8
A9 to A11
A12 to A15
I/O ports
A16 to A19
I/O ports
I/O ports
CS0
I/O ports
CS1
I/O ports
CS2
I/O ports
CS3
WR
WRL
−
(5)
BHE
WRH
−
(5)
RD
BCLK
HLDA
HOLD
ALE
RDY
01b ( CS2 is for multiplexed bus and
the others are for separate bus)
10b ( CS1 is for multiplexed bus and
the others are for separate bus)
8 bits
16 bits
High
Low
(6)
D0 to D7
D0 to D7
I/O ports
D8 to D15
(4)
A0
A0/D0
A1 to A7
A1 to A7
(4)
/D1 to D7
/D0 to D6
(4)
A8
A8/D7
WRL
−
(5)
WRH
−
(5)
11. Bus
Memory
Expansion Mode
11b (the entire
CS space is for
multiplexed bus)
(1, 2, 3)
8 bits
High
(6)
I/O ports
(6, 7)
I/O ports
A0/D0
A1 to A7
(4)
/D1 to D7
Undefined value
is output
I/O ports
I/O ports
I/O ports
−
(5)
−
(5)
Page 148 of 807
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