M16C/64C Group
14.2.4
Interrupt Source Select Register 3 (IFSR3A)
Interrupt Source Select Register 3
b7
b6 b5 b4
b3
b2
b1
0
0
IFSR31 and IFSR30 (INT7 and INT6 interrupt polarity select bit) (b1-b0)
When setting this bit to 1 (both edges), make sure the corresponding POL bit in registers INT6IC and
INT7IC is set to 0 (falling edge).
R01UH0092EJ0110 Rev.1.10
Jul 31, 2012
b0
Symbol
IFSR3A
Bit Symbol
Bit Name
IFSR30
INT6 interrupt polarity select
bit
INT7 interrupt polarity select
IFSR31
bit
—
Reserved bit
(b2)
Interrupt request source select
IFSR33
bit
Interrupt request source select
IFSR34
bit
Interrupt request source select
IFSR35
bit
Interrupt request source select
IFSR36
bit
—
Reserved bit
(b7)
Address
0205h
Function
0 : One edge
1 : Both edges
0 : One edge
1 : Both edges
Set to 0
0 : UART5 start/stop condition detection,
bus collision detection
1 : CEC1
0 : UART5 transmission, NACK
1 : CEC2
0 : UART6 start/stop condition detection,
bus collision detection
1 : Real-time clock cycle
0 : UART6 transmission, NACK
1 : Real-time clock compare
Set to 0
14. Interrupts
Reset Value
00h
RW
RW
RW
RW
RW
RW
RW
RW
RW
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