Processor Mode Register 2 (Pm2) - Renesas M16C/64C User Manual

M16C/64C Group
8.2.8

Processor Mode Register 2 (PM2)

Processor Mode Register 2
b7 b6 b5 b4 b3 b2 b1
0
Set the PRC1 bit in the PRCR register to 1 (write enabled) before rewriting this register.
PM21 (System clock protection bit) (b1)
The PM21 bit is used to protect the CPU clock. (Refer to 8.6 "System Clock Protection Function").
When the PM21 bit is set to 1, writing to the following bits has no effect:
•
Bits CM02, CM05, and CM07 in the CM0 register
•
Bits CM10 and CM11 in the CM1 register
•
The CM20 bit in the CM2 register
•
All bits in the PLC0 register
Do not execute the WAIT instruction when the PM21 bit is 1.
Once the PM21 bit is set to 1, it cannot be set to 0 by a program (writing 0 has no effect).
PM25 (Peripheral clock fC provide bit) (b5)
The PM25 bit provides fC to the real-time clock, CEC function, and remote control signal receiver. (See
Figure 8.5 "Peripheral Function Clocks".)
R01UH0092EJ0110 Rev.1.10
Jul 31, 2012
b0 Symbol
1
PM2
Bit Symbol Bit Name
—
Reserved bit
(b0)
PM21 System clock protection bit
—
No register bit. If necessary, set to 0. The read value is undefined.
(b2)
—
Reserved bit
(b3)
PM24 NMI interrupt enable bit
PM25 Peripheral clock fC provide bit
—
No register bits. If necessary, set to 0. The read value is undefined.
(b7-b6)
Address
001Eh
Function
Set to 1.
0 : Clock is protected by PRCR register
1 : Clock change disabled
Set to 0
0 : NMI interrupt disabled
1 : NMI interrupt enabled
0 : Not provided
1 : Provided
8. Clock Generator
Reset Value
XX00 0X01b
RW
RW
RW
—
RW
RW
RW
—
Page 96 of 807