Controller Area Network (Bxcan); Introduction; Bxcan Main Features - ST STM32F423 Reference Manual

Advanced arm-based 32-bit mcus
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RM0430
32

Controller area network (bxCAN)

32.1

Introduction

The Basic Extended CAN peripheral, named bxCAN, interfaces the CAN network. It
supports the CAN protocols version 2.0A and B. It has been designed to manage a high
number of incoming messages efficiently with a minimum CPU load. It also meets the
priority requirements for transmit messages.
For safety-critical applications, the CAN controller provides all hardware functions for
supporting the CAN Time Triggered Communication option.
32.2

bxCAN main features

Supports CAN protocol version 2.0 A, B Active
Bit rates up to 1 Mbit/s
Supports the Time Triggered Communication option
Transmission
Three transmit mailboxes
Configurable transmit priority
Time Stamp on SOF transmission
Reception
Two receive FIFOs with three stages
Scalable filter banks:
Identifier list feature
Configurable FIFO overrun
Time Stamp on SOF reception
Time-triggered communication option
Disable automatic retransmission mode
16-bit free running timer
Time Stamp sent in last two data bytes
Management
Maskable interrupts
Software-efficient mailbox mapping at a unique address space
Dual CAN peripheral configuration
CAN1: Master bxCAN for managing the communication between a Slave bxCAN and
the 512-byte SRAM memory
CAN2: Slave bxCAN, with no direct access to the SRAM memory.
The two bxCAN cells share the 512-byte SRAM memory (see
block
28 filter banks shared between CAN1 and CAN2 for dual CAN
14 filter banks for single CAN
diagram)
RM0430 Rev 8
Controller area network (bxCAN)
Figure 379: Dual-CAN
1085/1324
1130

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