Table 189. Transmit Fifo Status Flags; Table 190. Receive Fifo Status Flags - ST STM32F423 Reference Manual

Advanced arm-based 32-bit mcus
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Secure digital input/output interface (SDIO)
Flag
TXFIFOF
TXFIFOE
TXFIFOHE
TXDAVL
TXUNDERR
Receive FIFO
When the data path subunit receives a word of data, it drives the data on the write
databus. The write pointer is incremented after the write operation completes. On the
read side, the contents of the FIFO word pointed to by the current value of the read
pointer is driven onto the read databus. If the receive FIFO is disabled, all status flags
are deasserted, and the read and write pointers are reset. The data path subunit
asserts RXACT when it receives data.
The receive FIFO is accessible via 32 sequential addresses.
Flag
RXFIFOF
RXFIFOE
RXFIFOHF
RXDAVL
RXOVERR
1040/1324

Table 189. Transmit FIFO status flags

Set to high when all 32 transmit FIFO words contain valid data.
Set to high when the transmit FIFO does not contain valid data.
Set to high when 8 or more transmit FIFO words are empty. This flag can be used
as a DMA request.
Set to high when the transmit FIFO contains valid data. This flag is the inverse of
the TXFIFOE flag.
Set to high when an underrun error occurs. This flag is cleared by writing to the
SDIO Clear register.
Note: In case of TXUNDERR, and DMA is used to fill SDIO FIFO, user software
should disable DMA stream, and then write DMAEN bit in SDIO_DCTRL
with '0' (to disable DMA request generation).

Table 190. Receive FIFO status flags

Set to high when all 32 receive FIFO words contain valid data
Set to high when the receive FIFO does not contain valid data.
Set to high when 8 or more receive FIFO words contain valid data. This flag can be
used as a DMA request.
Set to high when the receive FIFO is not empty. This flag is the inverse of the
RXFIFOE flag.
Set to high when an overrun error occurs. This flag is cleared by writing to the SDIO
Clear register.
Note: In case of RXOVERR, and DMA is used to read SDIO FIFO, user software
should disable DMA stream, and then write DMAEN bit in SDIO_DCTRL
with '0' (to disable DMA request generation).
RM0430 Rev 8
Description
Table 190
lists the receive FIFO status flags.
Description
RM0430

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