Otg Host Channel X Interrupt Register (Otg_Hcintx); (X = 0 - ST STM32F423 Reference Manual

Advanced arm-based 32-bit mcus
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RM0430
Bits 21:20 MCNT[1:0]: Multicount
Note: This field must be set to at least 01.
Bits 19:18 EPTYP[1:0]: Endpoint type
Bit 17 LSDEV: Low-speed device
Bit 16 Reserved, must be kept at reset value.
Bit 15 EPDIR: Endpoint direction
Bits 14:11 EPNUM[3:0]: Endpoint number
Bits 10:0 MPSIZ[10:0]: Maximum packet size

33.15.26 OTG host channel x interrupt register (OTG_HCINTx)

(x = 0..11, where x = Channel number)
Address offset: 0x508 + (x * 0x20)
Reset value: 0x0000 0000
This register indicates the status of a channel with respect to USB- and AHB-related events.
It is shown in
interrupt bit in the core interrupt register (HCINT bit in OTG_GINTSTS) is set. Before the
application can read this register, it must first read the host all channels interrupt
(OTG_HAINT) register to get the exact channel number for the host channel-x interrupt
register. The application must clear the appropriate bit in this register to clear the
corresponding bits in the OTG_HAINT and OTG_GINTSTS registers.
31
30
29
Res.
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
Res.
This field indicates to the host the number of transactions that must be executed per frame
for this periodic endpoint. For non-periodic transfers, this field is not used
00: Reserved. This field yields undefined results
01: 1 transaction
10: 2 transactions per frame to be issued for this endpoint
11: 3 transactions per frame to be issued for this endpoint
Indicates the transfer type selected.
00: Control
01: Isochronous
10: Bulk
11: Interrupt
This field is set by the application to indicate that this channel is communicating to a low-
speed device.
Indicates whether the transaction is IN or OUT.
0: OUT
1: IN
Indicates the endpoint number on the device serving as the data source or sink.
Indicates the maximum packet size of the associated endpoint.
Figure
403. The application must read this register when the host channels
28
27
26
25
Res.
Res.
Res.
12
11
10
9
FRM
Res.
DTERR
OR
rc_w1
rc_w1
USB on-the-go full-speed (OTG_FS)
24
23
22
Res.
Res.
Res.
8
7
6
BBERR TXERR
Res.
rc_w1
rc_w1
rc_w1
RM0430 Rev 8
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
ACK
NAK
STALL
Res.
rc_w1
rc_w1
17
16
Res.
Res.
1
0
CHH
XFRC
rc_w1
rc_w1
1197/1324
1283

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