(Otg_Haintmsk) - ST STM32F423 Reference Manual

RM0430
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 HAINT[15:0]: Channel interrupts
33.15.23 OTG host all channels interrupt mask register

(OTG_HAINTMSK)

Address offset: 0x418
Reset value: 0x0000 0000
The host all channel interrupt mask register works with the host all channel interrupt register
to interrupt the application when an event occurs on a channel. There is one interrupt mask
bit per channel, up to a maximum of 16 bits.
31 30 29
Res. Res. Res. Res.
15 14 13
rw rw rw
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 HAINTM[15:0]: Channel interrupt mask
0: Masked interrupt
1: Unmasked interrupt
One bit per channel: Bit 0 for channel 0, bit 15 for channel 15
One bit per channel: Bit 0 for Channel 0, bit 15 for Channel 15
28 27 26 25
Res. Res. Res.
12 11 10 9
rw rw rw rw
USB on-the-go full-speed (OTG_FS)
24 23 22
Res. Res. Res.
8 7 6
HAINTM[15:0]
rw rw rw
RM0430 Rev 8
21 20 19 18
Res. Res. Res. Res.
5 4 3 2
rw rw rw rw
17 16
Res. Res.
1 0
rw rw
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