Int Interrupt; Nmi Interrupt - Renesas M16C/29 Series Hardware Manual

M16C/29 Group
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9.6 INT Interrupt

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INTi interrupt (i=0 to 5) is triggered by the edges of external inputs. The edge polarity is selected using the
IFSR register's IFSRi bit.
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To use the INT4 interrupt, set the IFSR register's IFSR6 bit to "1" (=INT4). To use the INT5 interrupt, set the
IFSR register's IFSR7 bit to "1" (=INT5).
After modifiying the IFSR6 or IFSR7 bit, clear the corresponding IR bit to "0" (=interrupt not requested)
before enabling the interrupt.
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The INT5 input has a digital debounce function for noise rejection. Refer to "19.6 Digital Debounce func-
tion" for details.
Figure 9.6.1 shows the IFSR registers.
Interrupt request cause select register
b7 b6 b5 b4
Note 1: When setting this bit to "1" (= both edges), make sure the INT0IC to INT5IC register's POL bit
is set to "0" (= falling edge).
Note 2: When setting this bit to "0" (= SI/O3, SI/O4), make sure the S3IC and S4IC registers' POL bit is
set to "0" (= falling edge).
Figure 9.6.1. IFSR Register
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9.7 NMI Interrupt

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An NMI interrupt request is generated when input on the NMI pin changes state from high to low, after the
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NMI interrupt was enabled by writing a "1" to bit 4 of register PM2. The NMI interrupt is a non-maskable
interrupt, once it is enabled.
The input level of this NMI interrupt input pin can be read by accessing the P8 register's P8_5 bit.
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NMI is disabled by default after reset (the pin is a GPIO pin, P8
register. Once enabled, it can only be disabled by a reset signal.
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The NMI input has a digital debounce function for noise rejection. Refer to "19.6 Digital Debounce
function" for details.
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
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b3 b2 b1 b0
Symbol
IFSR
Bit symbol
IFSR0 INT0 interrupt polarity
switching bit
IFSR1 INT1 interrupt polarity
switching bit
IFSR2 INT2 interrupt polarity
switching bit
IFSR3 INT3 interrupt polarity
switching bit
IFSR4 INT4 interrupt polarity
switching bit
IFSR5 INT5 interrupt polarity
switching bit
IFSR6 Interrupt request cause
select bit
IFSR7 Interrupt request cause
select bit
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page 76 of 402
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Address After reset
035F 00
16
16
Bit name
0 : One edge
1 : Both edges
0 : One edge
1 : Both edges
0 : One edge
1 : Both edges
0 : One edge
1 : Both edges
0 : One edge
1 : Both edges
0 : One edge
1 : Both edges
0 : SI/O3
1 : INT4
0 : SI/O4
1 : INT5
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) and can be enabled using bit 4 of PM2
5
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Function
RW
RW
(Note 1)
RW
(Note 1)
RW
(Note 1)
RW
(Note 1)
RW
(Note 1)
RW
(Note 1)
(Note 2)
RW
(Note 2)
RW
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9. Interrupts