Renesas M16C/29 Series Hardware Manual page 60

M16C/29 Group
System clock control register 0 (Note 1)
b7 b6 b5 b4 b3 b2 b1
Note 1: Write to this register after setting the PRC0 bit of PRCR register to "1" (write enable).
Note 2: The CM03 bit is set to "1" (high) when the CM04 bit is set to "0" (I/O port) or the microcomputer goes to a stop mode.
Note 3: This bit is provided to stop the main clock when the low power dissipation mode or on-chip oscillator low power dissipation mode
is selected. This bit cannot be used for detection as to whether the main clock stopped or not. To stop the main clock, the
following setting is required:
(1) Set the CM07 bit to "1" (Sub-clock select) or the CM21 bit of CM2 register to "1" (On-chip oscillator select) with the sub-clock
stably oscillating.
(2) Set the CM20 bit of CM2 register to "0" (Oscillation stop, re-oscillation detection function disabled).
(3) Set the CM05 bit to "1" (Stop).
Note 4: During external clock input, set the CM05 bit to "0"(Main clock oscilalting).
Note 5: When CM05 bit is set to "1", the X
the X pin is pulled "H" to the same level as X
IN
Note 6: After setting the CM04 bit to "1" (X
the CM07 bit from "0" to "1" (sub-clock).
Note 7: When entering stop mode from high or middle speed mode, on-chip oscillator mode or on-chip oscillator low power mode, the
CM06 bit is set to "1" (divide-by-8 mode).
Note 8: The f clock does not stop. During low speed or low power dissipation mode, do not set this bit to "1" (peripheral clock
C32
turned off when in wait mode).
Note 9: To use a sub-clock, set this bit to "1". Also make sure ports P8
Note 10: When the PM21 bit of PM2 register is set to "1" (clock modification disable), writing to the CM02, CM05, and CM07 bits has
no effect.
Note 11: If the PM21 bit needs to be set to "1", set the CM07 bit to "0"(main clock) before setting it.
Note 12: To use the main clock as the clock source for the CPU clock, follow the procedure below.
(1) Set the CM05 bit to "0" (oscillate).
(2) Wait until td(M-L) elapses or the main clock oscillation stabilizes, whichever is longer.
(3) Set the CM11, CM21 and CM07 bits all to "0".
Note 13: When the CM21 bit = 0 (on-chip oscillaor turned off) and the CM05 bit = 1 (main clock turned off), the CM06 bit is fixed to "1"
(divide-by-8 mode) and the CM15 bit is fixed to "1" (drive capability High).
Note 14: To return from on-chip oscillator mode to high-speed or middle-speed mode set the CM06 and CM15 bits both to "1".
Figure 7.2. CM0 Register
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
b0
Symbol
CM0
Bit symbol Bit name
Clock output function
CM00
select bit
CM01
Wait Mode peripheral function
CM02
clock stop bit (Note 10)
X -X
CIN COUT
CM03
select bit (Note 2)
Port X select bit
C
CM04
(Note 2)
Main clock stop bit
CM05
(Notes 3, 10, 12, 13)
Main clock division select
CM06
bit 0 (Notes 7, 13, 14)
System clock select bit
CM07
(Notes 6, 10, 11, 12)
pin goes "H". Furthermore, because the internal feedback resistor remains connected,
OUT
-X oscillator function), wait until the sub-clock oscillates stably before switching
CIN COUT
page 40 of 402
Address After reset
0006 01001000
16 2
Refer to Table 7.5.3.1 Function of CLK
0 : Do not stop peripheral function clock in wait mode
1 : Stop peripheral function clock in wait mode (Note 8)
drive capacity 0 : LOW
1 : HIGH
0 : I/O port P8
6
1 : X -X
CIN COUT
0 : On (Note 4)
1 : Off (Note 5)
0 : CM16 and CM17 valid
1 : Division by 8 mode
0 : Main clock, PLL clock, or on-chip oscillator clock
1 : Sub-clock
via the feedback resistor.
OUT
and P8 are directed for input, with no pull-ups.
6 7
7. Clock Generation Circuit
Function
pin
OUT
, P8
7
generation function(Note 9)
RW
RW
RW
RW
RW
RW
RW
RW
RW