Cold Start / Warm Start - Renesas M16C/29 Series Hardware Manual

16-bit single-chip microcomputer
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10.2 Cold start / Warm start

The WDC5 flag in the WDC register indicates the last reset by power on (cold start) or by reset signal (warm
start).
The WDC5 flag is set "0" at power on, and is set "1" at writing any data to the WDC register. The flag is not
set to "0" by the software reset and the input of reset signal. Figure 10.3 shows the operation of cold start
/ warm start.
VCC
RESET
WDC5 Flag
NOTES:
1. The timing of which WDC5 is set is affected by how the RESET signal rises (Time lag between T1 and T2).
Figure 10.3 Typical Operation of Cold start / Warm start
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
5V
0V
5V
Pch transistor ON (about 4V)
CPU reset exited
0V
T1
T2
"1"
T > 100 µsec.
"0"
Reset Sequence
page 82 of 402
Set to "1" by program
"1" is held even if
RESET becomes 0 V.
Program start
10. Watchdog Timer
Becomes "0" on the rising
edge of VCC

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