Renesas M16C/29 Series Hardware Manual page 101

M16C/29 Group
Setting the PM22 bit to "1" results in the following conditions
• The on-chip oscillator starts oscillating, and the on-chip oscillator clock becomes the watchdog timer
count source.
Watchdog timer period =
• The CM10 bit of CM1 register is disabled against write. (Writing a "1" has no effect, nor is stop mode
entered.)
• The watchdog timer does not stop when in wait mode.
CPU
clock
Write to WDTS register
RESET
Figure 10.1. Watchdog Timer Block Diagram
Watchdog timer control register
b7 b6 b5 b4
0
Note 1: Writing to the WDC register causes the WDC5 bit to be set to "1" (warm start).
Note 2: The WDC5 bit is set to "0" (cold start) when power is turned on and can be set to "1" by program only.
Watchdog timer start register (Note)
b7
Note : Write to the WDTS register after the watchdog timer interrupt occurs.
Figure 10.2. WDC Register and WDTS Register
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
Watchdog timer count (32768)
on-chip oscillator clock
Prescaler
CM07 = 0
WDC7 = 0
1/16
CM07 = 0
WDC7 = 1
1/128
CM07 = 1
1/2
On-chip oscillator clock
b3 b2 b1 b0
Symbol
WDC
Bit symbol
(b4-b0)
WDC5
(b6)
WDC7
b0
Symbol
WDTS
The watchdog timer is initialized and starts counting after a write instruction to
this register. The watchdog timer value is always initialized to "7FFF
regardless of whatever value is written.
page 81 of 402
PM22 = 0
Watchdog timer
PM22 = 1
Address
000F 00XXXXXX
16
Bit name
High-order bit of watchdog timer
Cold start / warm start
discrimination flag
(Note 1, 2)
Reserved bit
Prescaler select bit
Address
000E Indeterminate
16
Function
10. Watchdog Timer
PM12 = 0
Watchdog timer
interrupt request
PM12 = 1
Reset
Set to
"7FFF "
16
After reset
(Note 2)
2
Function
0 : Cold start
1 : Warm start
Must set to "0"
0 : Divided by 16
1 : Divided by 128
After reset
"
16
RW
RO
RW
RW
RW
RW
WO