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M16C/29 Group
(1) When the base timer is reset while the base timer increments the counter
Input waveform
(
When selects no
division (n+1) divisor
(2) When the base timer is reset while the base timer decrements the counter
Input waveform
(
When no selects no
division (n+1) divisor
Figure 13.1.4. Base Timer Operation in Two-phase Pulse Signal Processing Mode
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
P8
(A-phase)
0
P8
(B-phase)
1
f
BT1
)
INT1 (Z-phase)
Value of counter
P8
(A-phase)
0
P8
(B-phase)
1
f
BT1
)
INT1 (Z-phase)
Value of counter
Note 1: More or equal to 1.5 f
page 147 of 402
13. Timer S (Input Capture / Output Compare)
min 1 µs
min 1 µs
(Note 1)
Base timer starts counting
m
m+1
0
Set to "0" in this timing
min 1 µs
min 1 µs
(Note 1)
Base timer starts counting
m
m-1
0
Set to "0" in this timing
clock cycle are required.
BT1
1
2
Set to "1" in this timing
FFFF
FFFE
16
16
Set to "FFFF
" in this timing
16
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