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M16C/29 Group
15. A/D Converter
The microcomputer contains one A/D converter circuit based on 10-bit successive approximation method
configured with a capacitive-coupling amplifier. The analog inputs share the pins with P10
AN
), P0
to P0
(AN
7
0
7
___________
AN
). Similarly, AD
32
corresponding port direction bits are set to "0" (= input mode). Note that P0
P1
(AN
to AN
), and P9
3
20
23
When not using the A/D converter, set the VCUT bit to "0" (= V
from the V
pin into the resistor ladder, helping to reduce the power consumption of the chip.
REF
The A/D conversion result is stored in the ADi register bits for AN
pins .Table 15.1 shows the A/D converter performance. Figure 15.1 shows the A/D converter block dia-
gram and Figures 15.2 to 15.4 show the A/D converter associated with registers.
Table 15.1 A/D Converter Performance
Item
A/D Conversion Method Successive approximation (capacitive coupling amplifier)
Analog Input Voltage
Operating Clock f
AD (Note 2)
Resolution
Integral Nonlinearity Error
Operating Modes
Analog Input Pins
Conversion Speed Per Pin • Without sample and hold function
Note 1: Not dependent on use of sample and hold function.
Note 2: Set the fAD frequency to 10 MHz or less.
Without sample-and-hold function, set the fAD frequency to 250kH
With the sample and hold function, set the fAD frequency to 1MH
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
to AN
), P1
to P1
00
07
0
input shares the pin with P1
TRG
to P9
(AN
5
7
25
0V to AV
(V
(Note 1)
CC
CC
f
/divided-by-2 or f
AD
or f
/divided-by-12 or f
AD
8-bit or 10-bit (selectable)
When AV
= V
CC
• With 8-bit resolution: ±2LSB
• With 10-bit resolution: ±3LSB
When AV
= V
CC
• With 8-bit resolution: ±2LSB
• With 10-bit resolution: ±5LSB
One-shot mode, repeat mode, single sweep mode, repeat sweep mode 0, repeat
sweep mode 1, simultaneous sample sweep mode and delayed trigger mode 0,1
8 pins (AN
to AN
) + 8 pins (AN
0
7
8 pins (AN
to AN
) + 4 pins (AN
0
7
8-bit resolution: 49 f
• With sample and hold function
8-bit resolution: 28 f
page 214 of 402
, P9
, P9
to P9
(AN
3
3
5
7
. Therefore, when using these inputs, make sure the
5
to AN
) are available only in the 80-pin package.
27
unconnected), so that no current will flow
REF
, AN
i
Performance
)
/divided-by-3 or f
AD
AD
AD
= 5V
REF
= 3.3V
REF
to AN
) + 8 pins (AN
00
07
to AN
) + 1 pin (AN
00
03
cycles, 10-bit resolution: 59 f
AD
cycles, 10-bit resolution: 33 f
AD
15. A/D Converter
to P10
0
to AN
), and P9
to P9
20
27
0
to P0
(AN
to AN
4
7
04
, AN
(i = 0 to 7), and AN
0i
2i
/divided-by-4 or f
/divided-by-6
AD
to AN
) + 3 pins (AN
to AN
20
27
30
) + 3 pins (AN
to AN
)
24
30
32
cycles
AD
cycles
AD
or more.
Z
or more.
Z
(AN
to
7
0
(AN
to
2
30
), P1
to
07
0
(i=0 to 2)
3i
) (80pin-ver.)
32
(64pin-ver.)
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