Serial Data Logic Switching Function (Uart2); Txd And Rxd I/O Polarity Inverse Function (Uart2) - Renesas M16C/29 Series Hardware Manual

M16C/29 Group

14.1.2.2. Serial Data Logic Switching Function (UART2)

The data written to the U2TB register has its logic reversed before being transmitted. Similarly, the
received data has its logic reversed when read from the U2RB register. Figure 14.1.2.2.1 shows serial
data logic.
(1) When the U2C1 register's U2LCH bit = 0 (no reverse)
Transfer clock
TxD
2
(no reverse)
(2) When the U2C1 register's U2LCH bit = 1 (reverse)
Transfer clock
TxD
2
(reverse)
Note: This applies to the case where the U2C0 register's CKPOL bit = 0
(transmit data output at the falling edge of the transfer clock), the
U2C0 register's UFORM bit = 0 (LSB first), the U2MR register's
STPS bit = 0 (1 stop bit) and U2MR register's PRYE bit = 1 (parity
enabled).
Figure 14.1.2.2.1. Serial Data Logic Switching

14.1.2.3. TxD and RxD I/O Polarity Inverse Function (UART2)

This function inverses the polarities of the T
input/output data (including the start, stop and parity bits) are inversed. Figure 14.1.2.3.1 shows the
T D pin output and R
X
(1) When the U2MR register's IOPOL bit = 0 (no reverse)
Transfer clock
TxD
(no reverse)
RxD
(no reverse)
(2) When the U2MR register's IOPOL bit = 1 (reverse)
Transfer clock
TxD
(reverse)
RxD
(reverse)
Note: This applies to the case where the U2C0 register's UFORM bit = 0
(LSB first), the U2MR register's STPS bit = 0 (1 stop bit) and the
U2MR register's PRYE bit = 1 (parity enabled).
Figure 14.1.2.3.1. T
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
"H"
"L"
"H"
ST D0 D1
"L"
"H"
"L"
"H"
ST D0 D1
"L"
D pin input polarity inverse.
X
"H"
"L"
"H"
2
ST D0 D1
"L"
"H"
2 ST D0 D1
"L"
"H"
"L"
"H"
2
ST D0 D1
"L"
"H"
ST D0 D1
2
"L"
D and R D I/O Polarity Inverse
X X
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D2 D3 D4 D5 D6
D2 D3 D4 D5 D6
D2 pin output and R
X
D2 D3 D4 D5 D6
D2 D3 D4 D5 D6
D2 D3 D4 D5 D6
D2 D3 D4 D5 D6
14.1 UARTi (i=0 to 2)
D7 P SP
D7 P SP
ST : Start bit
P : Parity bit
SP : Stop bit
D2 pin input. The logic levels of all
X
D7 P SP
D7 P SP
D7 P SP
D7 P SP
ST : Start bit
P : Parity bit
SP : Stop bit