Renesas M16C/29 Series Hardware Manual page 208

16-bit single-chip microcomputer

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M16C/29 Group

This diagram applies to the case where the U2MR register's SMD2 to SMD0 bits = 010

IICM2, SWC, ALS, SWC2, SDHI : U2SMR2 register bit

STSPSEL, ACKD, ACKC

Note: If the IICM bit = 1, the pin can be read even when the PD7_1 bit = 1 (output mode).

Figure 14.1.3.1. I

C bus Mode Block Diagram

Rev.1.00 Nov 01,2004

REJ09B0101-0100Z

Start condition

Stop condition

Falling edge

Port register

Internal clock

: U2SMR register bit

: U2SMR4 register bit

page 188 of 402

14.1.3 Special Mode 1 (I

Start and stop condition generation block

Transmission

Reception register

9th bit falling edge

and the U2SMR register's IICM bit = 1.

C bus mode) (UART2)

DMA0, DMA1 request

UART2 transmit,

NACK interrupt

UART2 receive,

ACK interrupt request,

DMA1 request

Start/stop condition detection

interrupt request

M16c series M16c/tiny series