Int Interrupt - Renesas M16C Series Hardware Manual

R8C/11 Group
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10.2 INT Interrupt

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10.2.1 INT0 Interrupt
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INT0 interrupt is triggered by an INT0 input. When using INT0 interrupts, the INT0EN bit in the INTEN
register must be set to "1" (enabling). The edge polarity is selected using the INT0PL bit in the INTEN
register and the POL bit in the INT0IC register.
Inputs can be passed through a digital filter with three different sampling clocks.
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The INT0 pin is shared with the external trigger input pin of Timer Z.
Figure 10.10 shows the INTEN and INT0F registers.
E x t e r n a l i n p u t e n a b l e r e g i s t e r
b 7 b 6 b 5 b4 b 3
0 0 0 0 0 0
NOTES:
1. This bit must be set while the INT0STG bit in the PUM register is set to "0" (one-shot trigger disabled).
2. When setting the INT0PL bit to "1" (selecting both edges), the POL bit in the INT0IC must be set to "0"
(selecting falling edge).
3. The IR bit in the INT0IC register may be set to "1" (interrupt requested) when the INT0PL bit is rewritten.
Refer to the paragraph 19.2.5 "Changing Interrupt Factor" in the Usage Notes Reference Book.
I N T 0 i n p u t f i l t e r s e l e c t r e g i s t e r
b7 b6 b5 b4 b3
Figure 10.10 INTEN Register and INT0F Register
Rev.1.20 Jan 27, 2006
REJ09B0062-0120
b 2 b 1 b 0
S y m b o l
I N T E N
Bit symbol
I N T 0 E N
I N T 0 i n p u t e n a b l e b i t
I N T 0 P L
I N T 0 i n p u t p o l a r i t y s e l e c t b i t
Reserved bit
( b 7 - b 2 )
b2 b1 b0
0 S y m b o l
I N T 0 F
B i t s y m b o l
INT0 input filter select bit
INT0F0
I N T 0 F 1
Reserved bit
(b2)
Nothing is assigned.
( b 7 - b 3 )
When write, set to "0". If read, it content is
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A d d r e s s A f t e r r e s e t
0 0 9 6 0 0
1 6
1 6
Bit name
0 : D i s a b l e d
(1 )
1 : E n a b l e d
(2 ) 0 : O n e e d g e
1 : B o t h e d g e s
Set to "0"
A d d r e s s A f t e r r e s e t
0 0 1 E X X X X X 0 0 0
1 6
Bit name
b 1 b 0
0 0 : N o f i l t e r
0 1 : F i l t e r w i t h f
1 0 : F i l t e r w i t h f
1 1 : F i l t e r w i t h f
Set to "0"
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10.2 INT Interrupt
R W
F u n c t i o n
R W
R W
RW
2
RW
F u n c t i o n
RW
s a m p l i n g
1
s a m p l i n g
8
RW
s a m p l i n g
3 2
R W
indeterminate.