Renesas M16C/29 Series Hardware Manual page 195

16-bit single-chip microcomputer
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M16C/29 Group
Table 14.1.1.3 lists the functions of the input/output pins during clock synchronous serial I/O mode. Table
14.3 shows pin functions for the case where the multiple transfer clock output pin select function is dese-
lected. Table 14.1.1.4 lists the P6
Note that for a period from when the UARTi operation mode is selected to when transfer starts, the TxDi
pin outputs an "H". (If the N-channel open-drain output is selected, this pin is in a high-impedance state.)
Table 14.1.1.3. Pin Functions (When Not Select Multiple Transfer Clock Output Pin Function)
Pin name
TxDi (i = 0 to 2)
Serial data output
(P6
, P6
, P7
)
3
7
0
Serial data input
RxDi
(P6
, P6
, P7
)
2
6
1
CLKi
Transfer clock output
(P6
, P6
, P7
)
1
5
2
Transfer clock input
CTSi/RTSi
CTS input
(P6
, P6
, P7
)
0
4
3
RTS output
I/O port
Table 14.1.1.4. P6
4
Pin function
P6
4
CTS
1
RTS
1
CTS
(Note1)
0
CLKS
1
Note 1: In addition to this, set the U0C0 register's CRD bit to "0" (CTS
U0C0 register's CRS bit to "1" (RTS
Note 2: When the CLKMD1 bit = 1 and the CLKMD0 bit = 0, the following logic levels are output:
• High if the U1C0 register's CLKPOL bit = 0
• Low if the U1C0 register's CLKPOL bit = 1
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
pin functions during clock synchronous serial I/O mode.
4
Function
(Outputs dummy data when performing reception only)
PD6 register's PD6_2 bit=0, PD6_6 bit=0, PD7 register's PD7_1 bit=0
(Can be used as an input/output port when performing transmission only)
UiMR register's CKDIR bit=0
UiMR register's CKDIR bit=1
PD6 register's PD6_1 bit=0, PD6_5 bit=0, PD7 register's PD7_2 bit=0
UiC0 register's CRD bit=0
UiC0 register's CRS bit=0
PD6 register's PD6_0 bit=0, PD6_4 bit=0, PD7 register's PD7_3 bit=0
UiC0 register's CRD bit=0
UiC0 register's CRS bit=1
UiC0 register's CRD bit=1
Pin Functions
Bit set value
U1C0 register
CRD
CRS
RCSP
1
0
0
0
0
0
1
0
0
0
1
page 175 of 402
Method of selection
UCON register
CLKMD1
CLKMD0
0
0
0
0
1(Note 2)
1
selected).
0
14.1 UARTi (i=0 to 2)
PD6 register
PD6_4
Input: 0, Output: 1
0
0
/RTS
enabled) and the
0
0

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