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M16C/29 Group
S I/Oi control register (i=3,4) (Note 1)
b7
b6
b5
b4
b3
b2
Note 1: Make sure register S4C is written to by the next instruction after setting the PRCR register'sPRC2 bit to
"1"(write enable).
Note 2: Set the SMi3 bit to "1"(S
Note 3: Set the SMi3 bit to "1" and the corresponding port direction bit to "0"(input mode).
Note 4: Effective when SMi3 bit = 1.
SI/Oi bit rate generator (i=3,4) (Notes 1,2)
b7
Note 1: Write to this register while serial I/O is neither transmitting or receiving.
Note 2: Use MOV instruction to write to this regisgter.
SI/Oi transmit/receive register (i=3,4) (Notes 1,2)
b7
Note 1: Write to this register while serial I/O is neither transmitting or receiving.
Note 2: To receive data set the corresponding port direction bit for S
Figure 14.2.2. S3C and S4C Registers, S3BRG and S4BRG Registers, and S3TRR and S4TRR Registers
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
b1
b0
Symbol
S3C
S4C
Bit
Bit name
symbol
SMi0
Internal synchronous clock
select bit
SMi1
SMi2
S
i output disable bit
OUT
SMi3
S I/Oi port select bit
SMi4
CLK polarity selct bit
SMi5
Transfer direction select bit
SMi6
Synchronous clock select bit
SMi7
S
i initial value set bit
OUT
i output, CLKi function).
OUT
b0
Symbol
S3BRG
S4BRG
Description
Assuming that set value = n, BRGi divides the count source
by n + 1
b0
Symbol
S3TRR
S4TRR
Transmission/reception starts by writing transmit data to this register. After transmission/
reception finishes, reception data can be read by reading this register.
page 210 of 402
Address
After reset
0362
01000000
16
2
0366
01000000
16
2
Description
b1 b0
0 0 : Selecting f
or f
1
2
0 1 : Selecting f
8
1 0 : Selecting f
32
1 1 : Must not be set
0 : S
i output
OUT
(Note 4)
1 : S
i output disable(high impedance)
OUT
0 : Input/output port
1 : S
i output, CLKi function
OUT
0 : Transmit data is output at falling edge of
transfer clock and receive data is input at
rising edge
1 : Transmit data is output at rising edge of
transfer clock and receive data is input at
falling edge
0 : LSB first
1 : MSB first
0 : External clock (Note 2)
1 : Internal clock (Note 3)
Effective when SMi3 = 0
0 : "L" output
1 : "H" output
Address
After reset
0363
??
16
0367
??
16
Address
After reset
0360
??
16
0364
??
16
Description
i ti "0"(input mode)
IN
14.2 SI/O 3 and SI/O 4
RW
RW
RW
RW
RW
RW
RW
RW
RW
16
16
Setting range
RW
00
to FF
WO
16
16
16
16
RW
RW
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