Renesas M16C/29 Series Hardware Manual page 114

M16C/29 Group
• Main clock
f
1
• PLL clock
• On-chip
oscillator clock
f f f f
1 or 2 8 32
TB0
IN
TB1
IN
TB2
IN
Figure 12.2. Timer B Configuration
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
f
2
PCLK0 bit = 0
1/2
PCLK0 bit = 1
1/8
1/4
f
C32
Timer B2 overflow or underflow ( to Timer A count source)
Noise
filter
Noise
filter
Noise
filter
page 94 of 402
f f
1 or 2
X
CIN
f
8
Set the CPSR bit of CPSRF
register to "1" (= prescaler
f
32
reset)
• Timer mode
• Pulse width measuring mode,
pulse period measuring mode
• Event counter mode
• Timer mode
• Pulse width measuring mode,
pulse period measuring mode
• Event counter mode
• Timer mode
• Pulse width measuring mode,
pulse period measuring mode
• Event counter mode
Clock prescaler
f
1/32
Reset
Timer B0 interrupt
Timer B0
Timer B1 interrupt
Timer B1
Timer B2 interrupt
Timer B2
12.1 Timer A
C32