Table of Contents
Advertisement
M16C/29 Group
17.2. Operational Modes
The CAN module has the following four operational modes.
• CAN Reset/Initialization Mode
• CAN Operation Mode
• CAN Sleep Mode
• CAN Interface Sleep Mode
Figure 17.17 shows transition between operational modes.
MCU Reset
CAN interface
sleep mode
CCLK3: CCLKR register's bit
Reset, Sleep, RetBusOff: C0CTLR register's bits
State_Reset, tate_BusOff: C0STR register's bits
Figure 17.17 Transition Between Operational Modes
17.2.1. CAN Reset/Initialization Mode
The CAN reset/initialization mode is activated upon MCU reset or by setting the Reset bit in the C0CTLR
register to "1". If the Reset bit is set to "1", check that the State_Reset bit in the C0STR register is set to
"1". Entering the CAN reset/initialization mode initiates the following functions by the module:
• CAN communication is impossible.
• When the CAN reset/initialization mode is activated during an ongoing transmission in operation
mode, the module suspends the mode transition until completion of the transmission (successful,
arbitration loss, or error detection). Then, the State_Reset bit is set to "1", and the CAN reset/
initialization mode is activated.
• The C0MCTLj (j = 0 to 15), C0STR, C0ICR, C0IDR, C0RECR, C0TECR and C0TSR registers are
initialized. All these registers are locked to prevent CPU modification.
• The C0CTLR, C0CONR, C0GMR, C0LMAR and C0LMBR registers and the CAN0 message box
retain their contents and are available for CPU access.
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
CAN reset/initialization
mode
State_Reset = 1
Sleep = 0
and
Reset = 1
CCLK3 = 1
CAN sleep mode
CCLK3 = 0
page 293 of 402
Reset = 0
Reset = 1
Sleep = 1
and
Reset = 0
Reset = 1
CAN operation mode
State_Reset = 0
when 11 consecutive
recessive bits are
detected 128 times
TEC > 255
or
RetBusOff = 1
Bus off state
State_BusOff = 1
17. CAN Module
Advertisement
Table of Contents
