Table of Contents
Advertisement
M16C/29 Group
9.2 Interrupts and Interrupt Vector
One interrupt vector consists of 4 bytes. Set the start address of each interrupt routine in the respective
interrupt vectors. When an interrupt request is accepted, the CPU branches to the address set in the
corresponding interrupt vector. Figure 9.2.1 shows the interrupt vector.
Figure 9.2.1. Interrupt Vector
9.2.1 Fixed Vector Tables
The fixed vector tables are allocated to the addresses from FFFDC
the fixed vector tables. In the flash memory version of microcomputer, the vector addresses (H) of
fixed vectors are used by the ID code check function. For details, refer to the section "flash memory
rewrite disabling function".
Table 9.2.1.1. Fixed Vector Tables
Interrupt source
Undefined instruction FFFDC
Overflow
BRK instruction
Address match
Single step (Note)
Watchdog timer
Oscillation stop and
re-oscillation detection
Voltage down
detection
________
DBC (Note)
_______
NMI
Reset
Note: Do not normally use this interrupt because it is provided exclusively for use by development sup-
port tools.
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
Vector address (L)
Vector address (H)
Vector table addresses
Address (L) to address (H)
to FFFDF
16
FFFE0
to FFFE3
16
FFFE4
to FFFE7
16
FFFE8
to FFFEB
16
FFFEC
to FFFEF
16
FFFF0
to FFFF3
16
FFFF4
to FFFF7
16
FFFF8
to FFFFB
16
FFFFC
to FFFFF
16
page 64 of 402
MSB
Low address
Mid address
0 0 0 0
High address
0 0 0 0
Remarks
Interrupt on UND instruction
16
Interrupt on INTO instruction
16
If the contents of address
16
FFFE7
is FF
16
16
ecution starts from the address
shown by the vector in the
relocatable vector table.
16
16
16
16
16
16
LSB
0 0 0 0
to FFFFF
. Table 9.2.1.1 lists
16
16
Reference
M16C/60, M16C/20
serise software
maual
, program ex-
Address match interrupt
Watchdog timer
Clock generating circuit
Voltage detection circuit
_______
NMI interrupt
Reset
9. Interrupts
Advertisement
Table of Contents
