Renesas M16C/29 Series Hardware Manual page 210

M16C/29 Group
Table 14.1.3.3. Registers to Be Used and Settings in I
Register Bit
U2SMR4 STAREQ
RSTAREQ
STPREQ
STSPSEL
ACKD
ACKC
SCLHI
SWC9
Note 1: Not all register bits are described above. Set those bits to "0" when writing to the registers in I
mode.
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
Master
Set this bit to "1" to generate start
condition
Set this bit to "1" to generate restart
condition
Set this bit to "1" to generate stop
condition
Set this bit to "1" to output each condition Set to "0"
Select ACK or NACK
Set this bit to "1" to output ACK data
Set this bit to "1" to have SCL2 output
stopped when stop condition is detected
Set to "0"
page 190 of 402
14.1.3 Special Mode 1 (I
2 C bus Mode (2) (Continued)
Function
Set to "0"
Set to "0"
Set to "0"
Select ACK or NACK
Set this bit to "1" to output ACK data
Set to "0"
Set this bit to "1" to set the SCL
hold at the falling edge of the 9th bit of
clock
2
C bus mode) (UART2)
Slave
to "L"
2
2
C bus