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M16C/29 Group
•Example when selecting AN
•Example 1: When AD
pin input
AD
TRG
ADST flag
ADERR0 flag
ADERR1 flag
ADTCSF flag
ADSTT0 flag
ADSTT1 flag
ADSTRT0 flag
ADSTRT1 flag
IR bit in the ADIC
register
•Example 2: When AD
AD
pin input
TRG
ADST flag
ADERR0 flag
ADERR1 flag
ADTCSF flag
ADSTT0 flag
ADSTT1 flag
ADSTRT0 flag
ADSTRT1 flag
IR bit in the ADIC
register
ADST flag: Bit 6 in the ADCON0 register
ADERR0, ADERR1, ADTCSF, ADSTT0, ADSTT1, ADSTRT0 and ADSTRT1 flag: bits 0, 1, 3, 4, 5, 6 and 7 in the ADSTAT0 register
Figure 15.1.8.2 Each Flag Operation in ADSTAT0 Register Associated with the Operation Example
in Delayed Trigger Mode 1 (1)
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
to AN
to A/D sweep pins (SCAN1 to SCAN0="01
0
3
pin falling edge is generated during AN
TRG
AN
0
AN
1
AN
2
AN
3
"1"
"0"
Do not set to "1" by program
"1"
"0"
"1"
"0"
"1"
"0"
"1"
"0"
"1"
"0"
"1"
"0"
"1"
"0"
"1"
"0"
Set to "0" by interrupt request acknowledgement or a program
pin falling edge is generated again after AN
TRG
AN
0
AN
1
AN
2
AN
3
"1"
"0"
Do not set to "1" by program
"1"
"0"
"1"
"0"
"1"
"0"
"1"
"0"
"1"
"0"
"1"
"0"
"1"
"0"
"1"
"0"
Set to "0" by interrupt request acknowledgment or a program
page 241 of 402
")
2
pin conversion
0
Set to "0" by program
pin conversion
0
Set to "0" by program
15. A/D Converter
A/D pin input
voltage sampling
A/D pin conversion
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