Simultaneous Sample Sweep Mode - Renesas M16C/29 Series Hardware Manual

M16C/29 Group

15.1.6 Simultaneous Sample Sweep Mode

In simultaneous sample sweep mode, analog voltage is applied to the selected pins are converted one-
by-one to a digital code. At this time, the input voltage of AN0 and AN1 are sampled simultaneously using
two circuits of sample and hold circuit. Table 15.1.6.1 shows the simultaneous sample sweep mode
specifications. Figure 15.1.6.1 shows the operation example in simultaneous sample sweep mode. Fig-
ure 15.1.6.2 shows ADCON0 to ADCON2 registers and Figure 15.1.6.3 shows ADTRGCON registers in
simultaneous sample sweep mode. Table 15.1.6.2 shows the trigger select bit setting in simultaneous
sample sweep mode. In simultaneous sample sweep mode, Timer B0 underflow can be selected as a
trigger by combining software trigger, AD
frequency setting counter underflow or A/D trigger mode of Timer B.
Table 15.1.6.1 Simultaneous Sample Sweep Mode Specifications
Item
Function
A/D Conversion Start Condition
A/D Conversion Stop Condition
Interrupt Generation Timing A/D conversion completed
Analog Input Pin
Readout of A/D conversion result Readout one of the AN0 to AN7 registers that corresponds to the selected pin
Note 1. AN to AN
00 07
However, all input pins need to belong to the same group.
•Example when selecting AN
A/D conversion started
AN
0
AN
1
AN
2
AN
3
AN
4
AN
5
AN
6
AN
7
Figure 15.1.6.1 Operation Example in Simultaneous Sample Sweep Mode
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
The SCAN1 to SCAN0 bits in the ADCON1 register and ADGSEL1 to
ADGSEL0 bits in the ADCON2 register select pins. Analog voltage applied to
the selected pins is converted one-by-one to a digital code. At this time, the
input voltage of AN
When the TRG bit in the ADCON0 register is "0" (software trigger)
Set the ADST bit in the ADCON0 register to "1" (A/D conversion started)
When the TRG bit in the ADCON0 register is "1" (hardware trigger)
The trigger is selected by TRG1 and HPTRG0 bits (See Table 15.1.6.2)
The AD pin input changes state from "H" to "L" after setting the ADST bit
TRG
to "1" (A/D conversion started)
Timer B0, B2 or Timer B2 interrupt generation frequency setting counter
underflow after setting the ADST bit to "1" (A/D conversion started)
A/D conversion completed (If selecting software trigger, the ADST bit is
automatically set to "0" ).
Set the ADST bit to "0" (A/D conversion halted)
Select from AN
AN to AN (8 pins) (Note 1)
0 7
, AN to AN , and AN
20 27
to AN to A/D pins for sweep (SCAN1 to SCAN0="01
0 3
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trigger, Timer B2 underflow, Timer B2 interrupt generation
TRG
Specification
and AN are sampled simultaneously.
0 1
to AN (2 pins), AN to AN
0 1 0
to AN can be used in the same way as AN
30 32
A/D interrupt request generated
15. A/D Converter
(4 pins),AN to AN (6 pins), or
3 0 5
to AN
0
")
2
A/D pin input voltage
sampling
A/D pin conversion
.
7