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M16C/29 Group
2
I
C0 control register 0
b7
b6
b5
b4
b3
2
Figure 16.4 I
C0 control register 0
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
b2
b1
b0
Symbol
S1D0
Bit Symbol
Bit counter
BC0
(Number of transmit/receive
bits)
(Note 1)
BC1
BC2
2
I C bus interface
ES0
enable bit
ALS
Data format select bit
Reserved bit
(b5)
2
I C bus interface
IHR
reset bit
2
I C bus interface pin
TISS
input level select bit
Note 1: In the following status, the bit counter is cleared automatically
•Start condition/stop condition are detected
•Immediately after the completion of 1-byte data transmit
•Immediately after the completion of 1-byte data receive
page 251 of 402
16. MULTI-MASTER I
Address
After reset
02E3
16
Bit Name
b2 b1 b0
0
0
0 : 8
0
0
1 : 7
0
1
0 : 6
0
1
1 : 5
1
0
0 : 4
1
0
1 : 3
1
1
0 : 2
1
1
1 : 1
0: Disabled
1: Enabled
0: Addressing format
1: Free data format
Set to "0"
0: Reset release (auto)
1: Reset
2
0: I C bus input
1: SMBUS input
2
C bus INTERFACE
00
16
Function
RW
RW
RW
RW
RW
RW
RW
RW
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