Event Counter Mode - Renesas M16C/29 Series Hardware Manual

M16C/29 Group

12.2.2 Event Counter Mode

In event counter mode, the timer counts pulses from an external device or overflows and underflows of
other timers (see Table 12.2.2.1) . Figure 12.2.2.1 shows TBiMR register in event counter mode.
Table 12.2.2.1 Specifications in Event Counter Mode
Item
Count source
Count operation
Divide ratio
Count start condition
Count stop condition
Interrupt request generation timing Timer underflow
TBi pin function
IN
Read from timer
Write to timer
Notes:
1. The TB0S to TB2S bits are assigned to the TABSR register bit 5 to bit 7.
Timer Bi mode register (i=0 to 2)
b7 b6 b5 b4
Note 1: Effective when the TCK1 bit = "0" (input from TBiIN pin). If the TCK1 bit = "1" (TBj overflow or underflow), these
bits can be set to "0" or "1".
Note 2: The port direction bit for the TBi
Figure 12.2.2.1 TBiMR Register in Event Counter Mode
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
• External signals input to TBi
in program)
• Timer Bj overflow or underflow (j=i-1, except j=2 if i=0)
• Down-count
• When the timer underflows, it reloads the reload register contents and
continues counting
1/(n+1)
1
Set TBiS bit to "1" (= start counting)
Set TBiS bit to "0" (= stop counting)
Count source input
Count value can be read by reading TBi register
• When not counting and until the 1st count source is input after counting start
Value written to TBi register is written to both reload register and counter
• When counting (after 1st count source input)
Value written to TBi register is written to only reload register
(Transferred to counter when reloaded next)
b3 b2 b1 b0
Symbol
0 1 TB0MR to TB2MR
Bit symbol
TMOD0
Operation mode select bit
TMOD1
MR0 Count polarity select
bit
MR1
TB0MR register
MR2
Must be set to "0" in timer mode
TB1MR, TB2MR registers
Nothing is assigned. When write, set to "0". When read, its
content is indeterminate.
When write in event counter mode, set to "0". When read in event
MR3
counter mode, its content is indeterminate.
Has no effect in event counter mode.
TCK0
Can be set to "0" or "1".
Event clock select
TCK1
pin must be set to "0" (= input mode).
IN
page 112 of 402
Specification
pin (i=0 to 2) (effective edge can be selected
IN
n: set value of TBi register
Address After reset
039B to 039D 00XX0000
16 16
Bit name
b1 b0
0 1 : Event counter mode
b3 b2
0 0 : Counts external signal's
(Note 1)
falling edges
0 1 : Counts external signal's
rising edges
1 0 : Counts external signal's
falling and rising edges
1 1 : Must not be set
0 : Input from TBi
1 : TBj overflow or underflow
(j = i – 1, except j = 2 if i = 0)
0000 to FFFF
16 16
2
Function
RW
RW
RW
RW
RW
RW
RO
RW
pin (Note 2)
IN
RW
12.2 Timer B