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M16C/29 Group
Timer Ai register (i= 0 to 4) (Note 1)
(b15)
b7
Note 1: The register must be accessed in 16 bit units.
Note 2: If the TAi register is set to '0000
Note 3: If the TAi register is set to '0000
Note 4: Use the MOV instruction to write to the TAi register.
Note 5: The timer counts pulses from an external device or overflows or underflows in other timers.
Count start flag
b7
b6
b5
Up/down flag (Note 1)
b7
b6
b5
Note 1: Use MOV instruction to write to this register.
Note 2: Make sure the port direction bits for the TA2
Note 3: When not using the two-phase pulse signal processing function, set the corresponding bit to "0".
Figure 12.1.3. TA0 to TA4 Registers, TABSR Register, and UDF Register
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
(b8)
b0 b7
b0
Mode
Timer
Divide the count source by n + 1 where n =
mode
set value
Event
Divide the count source by FFFF
counter
where n = set value when counting up or
mode
by n + 1 when counting down
One-shot
Divide the count source by n where n = set
timer mode
value and cause the timer to stop
Modify the pulse width as follows:
Pulse width
PWM period: (2
modulation
High level PWM pulse width: n / fj
mode
(16-bit PWM)
where n = set value, fj = count source
frequency
Pulse width
Modify the pulse width as follows:
modulation
PWM period: (2
mode
High level PWM pulse width: (m + 1)n / fj
(8-bit PWM)
where n = high-order address set value,
m = low-order address set value, fj =
count source frequency
16
requests are not generated either. Furthermore, if "pulse output" is selected, no pulses are
output from the TAiOUT pin.
16
level on the TAiOUT pin remains low, and timer Ai interrupt requests are not generated
either. The same applies when the 8 high-order bits of the timer TAi register are set to '001
6' while operating as an 8-bit pulse width modulator.
Symbol
b4
b3
b2
b1
b0
TABSR
Bit symbol
TA0S
Timer A0 count start flag
TA1S
Timer A1 count start flag
TA2S
Timer A2 count start flag
TA3S
Timer A3 count start flag
TA4S
Timer A4 count start flag
TB0S
Timer B0 count start flag
TB1S
Timer B1 count start flag
TB2S
Timer B2 count start flag
Symbol
b4
b3
b2
b1
b0
UDF
Bit symbol
Timer A0 up/down flag
TA0UD
TA1UD
Timer A1 up/down flag
TA2UD
Timer A2 up/down flag
TA3UD
Timer A3 up/down flag
Timer A4 up/down flag
TA4UD
Timer A2 two-phase pulse
TA2P
signal processing select bit
TA3P
Timer A3 two-phase pulse
signal processing select bit
Timer A4 two-phase pulse
TA4P
signal processing select bit
"0" (input mode).
page 96 of 402
Symbol
Address
TA0
0387
, 0386
16
16
TA1
0389
, 0388
16
16
TA2
038B
, 038A
16
16
TA3
038D
, 038C
16
16
TA4
038F
, 038E
16
16
Function
– n + 1
16
(Note 5)
16
– 1) / fj
8
– 1) x (m + 1)/ fj
,' the counter does not work and timer Ai interrupt
,' the pulse width modulator does not work, the output
Address
After reset
0380
00
16
16
Bit name
Function
0 : Stops counting
1 : Starts counting
Address
After reset
0384
00
16
16
Bit name
Function
0 : Down count
1 : Up count
Enabled by setting the TAiMR
register's MR2 bit to "0"
(= switching source in UDF
register) during event counter
mode.
0 : two-phase pulse signal
processing disabled
1 : two-phase pulse signal
processing enabled
to TA4I
and TA2
to TA4
IN
N
OUT
After reset
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
RW
Setting range
0000
to FFFF
16
16
RW
0000
to FFFF
16
16
RW
0000
to FFFF
16
16
WO
(Notes 2, 4)
0000
to FFFE
16
16
(Note 3, 4)
WO
00
to FE
16
16
(High-order address)
00
to FF
16
16
(Low-order address)
WO
(Note 3, 4)
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
WO
WO
(Notes 2, 3)
WO
pins are set to
OUT
12.1 Timer A
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