Renesas M16C/29 Series Hardware Manual page 7

7.8.1 Operation When CM27 bit = 0 (Oscillation Stop Detection Reset)........................... 58
7.8.2 Operation When CM27 bit = 1 (Oscillation Stop and Re-oscillation Detect Interrupt) ....... 58
7.8.3 How to Use Oscillation Stop and Re-oscillation Detect Function ............................. 59
8. Protection .......................................................................................................60
9. Interrupts ........................................................................................................61
9.1 Type of Interrupts ............................................................................................................ 61
9.1.1 Software Interrupts ................................................................................................... 62
9.1.1.1 Undefined Instruction Interrupt .......................................................................... 62
9.1.1.2 Overflow Interrupt .............................................................................................. 62
9.1.1.3 BRK Interrupt ..................................................................................................... 62
9.1.1.4 INT Instruction Interrupt ..................................................................................... 62
9.1.2 Hardware Interrupts ................................................................................................. 63
9.1.2.1 Special Interrupts ............................................................................................... 63
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9.1.2.1.1 NMI Interrupt ............................................................................................... 63
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9.1.2.1.2 DBC Interrupt .............................................................................................. 63
9.1.2.1.3 Watchdog Timer Interrupt ............................................................................ 63
9.1.2.1.4 Oscillation Stop and Re-oscillation Detection Interrupt ............................... 63
9.1.2.1.5 Voltage Down Detection Interrupt ................................................................ 63
9.1.2.1.6 Single-step Interrupt .................................................................................... 63
9.1.2.1.7 Address Match Interrupt .............................................................................. 63
9.1.2.2 Peripheral Function Interrupts ........................................................................... 63
9.2 Interrupts and Interrupt Vector ........................................................................................ 64
9.2.1 Fixed Vector Tables .................................................................................................. 64
9.2.2 Relocatable Vector Tables ........................................................................................ 65
9.3 Interrupt Control .............................................................................................................. 66
9.3.1 I Flag ........................................................................................................................ 69
9.3.2 IR Bit ........................................................................................................................ 69
9.3.3 ILVL2 to ILVL0 Bits and IPL ...................................................................................... 69
9.4 Interrupt Sequence ......................................................................................................... 70
9.4.1 Interrupt Response Time .......................................................................................... 71
9.4.2 Variation of IPL when Interrupt Request is Accepted ............................................... 71
9.4.3 Saving Registers ...................................................................................................... 72
9.4.4 Returning from an Interrupt Routine ......................................................................... 74
9.5 Interrupt Priority .............................................................................................................. 74
9.5.1 Interrupt Priority Resolution Circuit .......................................................................... 74
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9.6 INT Interrupt ................................................................................................................... 76
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9.7 NMI Interrupt ................................................................................................................... 76
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