Bit 6: Communication Mode Select Bit (Transfer Direction Select Bit: Trx); Bit 7: Communication Mode Select Bit (Master/Slave Select Bit: Mst) - Renesas M16C/29 Series Hardware Manual

M16C/29 Group

16.5.7 Bit 6: Communication mode select bit (transfer direction select bit: TRX)

This bit decides a transfer direction for the data communication. When this bit is "0", receive mode is
selected and the data from a transmit device is received. When the bit is "1", transmit mode is selected
and the address data and the control data are output onto the S
ated on the S . This bit can be set/reset by software or hardware. This bit is set to "1" by hardware in the
CL
following condition:
•In slave mode with the ALS = 0, if the AAS flag is set to "1" after the address data receive and the
___
received R/W bit is "1".
This bit is set to "0" by hardware in one of the following conditions:
•When an arbitration lost is detected.
•When a STOP condition is detected.
•When a START condition is detected.
•When a start condition is disabled by the START condition duplicate protect function
•When a start condition is detected with MST = 0.
•When ACK non-return is detected with MST = 0.
•ES0 = 0.
•At reset

16.5.8 Bit 7: Communication mode select bit (master/slave select bit: MST)

This bit is used for the master/slave select bit for the data communication. When this bit is "0", the slave is
specified, so that a START condition and a STOP condition are generated by the master are received. The
data communication is performed synchronized with the clock generated by the master. When this bit is
"1", the master is specified and a START condition and a STOP condition are generated.
Additionally, the clocks required for the data communication are generated on the S
This bit is set to "0" by hardware in one of the following conditions.
•Immediately after the completion of 1-byte data transfer,which lost the arbitration, when arbitration lost is
detected.
•When a STOP condition is detected.
•When a START condition is detected.
•Writing a start condition is disabled by the start condition duplicate protect function
•At reset
Note 1. START condition duplicate protect function
The MST, TRX, and BB bits are set to "1" at the same time after confirming that the BB flag is "0"
in the procedure of a START condition generation. However, when a START condition generation
by other master devices and the BB flag is set to "1" immediately after the contents of the BB flag
are confirmed, the START condition duplicate protect function makes the writing to the MST and
TRX bits invalid. The duplicate protect function becomes valid from the rising of the BB flag to
receive completion of the slave address. Refer to Section 16.9 START Condition Generation
Method for details.
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
page 263 of 402
2
16. MULTI-MASTER I
synchronized with the clock gener-
DA
(1)
.
CL
(Note 1)
C bus INTERFACE
.
.