Renesas M16C/29 Series Hardware Manual page 239

M16C/29 Group
Timer B2 special mode register
b7 b6 b5 b4 b3 b2 b1
Note 1. Write to this register after setting the PRC1 bit in the PRCR register to "1" (write enabled).
Note 2. If the INV11 bit is "0" (three-phase mode 0) or the INV06 bit is "1" (triangular wave modulation mode), set
this bit to "0" (timer B2 underflow).
Note 3. When setting the IVPCR1 bit to "1" (three-phase output forcible cutoff by SD pin input enabled), Set the PD8_5
bit to "0" (= input mode).
Note 4. Related pins are U(P8
Set the IVPCR1 bit to "0", and this forcible cutoff will be reset. If L is input to the P8
control timer output will be disabled (INV03=0). At this time, when the IVPCR1 bit is "0", the target pins changes to
programmable I/O port. When the IVPCR1 bit is "1", the target pins changes to high-impedance state regardless of
which functions of those pins are used.
Note 5. When this bit is used in delayed trigger mode 0, set the TB0EN and TB1EN bits to "1"(A/D trigger mode)
Note 6. When setting the TB2SEL bit to "1" (underflow of TB2 interrupt generation frequency setting counter[ICTB2]), Set the INV02
bit to "1" (three-phase motor control timer function).
Note 7. Refer to "19.6 Digital Debounce function" for the SD input
Figure 15.5 TB2SC Register
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
(Note 1)
b0
Symbol Address
TB2SC 039E
16
Bit symbol Bit name
Timer B2 Reload Timing
PWCON
Switch Bit (Note 2)
Three-Phase Output Port
IVPCR1
SD Control Bit 1
Timer B0 Operation Mode
TB0EN
Select Bit
Timer B1 Operation Mode
TB1EN
Select Bit
TB2SEL Trigger Select Bit
Reserved bits
(b6-b5)
Nothing is assigned. When write, set to "0".
(b7)
When read, its content is 0 .
), U(P8 ), V(P7 ), V(P7
0 1 2
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After reset
X0000000
2
0 : Timer B2 underflow
1 : Timer A output at odd-numbered
0 : Three-phase output forcible cutoff
by SD pin input (high impedance)
disabled
(Note 3, 4, 7)
1 : Three-phase output forcible cutoff
by SD pin input (high impedance)
enabled
0 : Other than A/D trigger mode
1 : A/D trigger mode
0 : Other than A/D trigger mode
1 : A/D trigger mode
(Note 6) 0 : TB2 interrupt
1 : Underflow of TB2 interrupt
generation frequency setting counter [ICTB2]
Must set to "0".
), W(P7 ), W(P7 ). After forcible cutoff, input "H" to the P8
3 4 5
RW
Function
RW
(Note 5)
RW
(Note 5)
RW
/NMI/SD pin.
5
/NMI/SD pin, a three-phase motor
5
15. A/D Converter
RW
RW
RW