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M16C/29 Group
A/D trigger control register (Note 1)
b7
b6
b5
b4
b3
0
Note 1: If ADTRGCON is rewritten during A/D conversion, the conversion result will be indeterminate.
Figure 15.1.8.5 ADTRGCON Register in Delayed Trigger Mode 1
Table 15.1.8.2 Trigger Select Bit Setting in Delayed Trigger Mode 1
TRG
TRG1
0
1
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
b2
b1
b0
Symbol
1
1
ADTRGCON
Bit symbol
A/D Operation Mode
SSE
Select Bit 2
A/D Operation Mode
DTE
Select Bit 3
AN0 Trigger Select Bit
HPTRG0
AN1 Trigger Select Bit
HPTRG1
Nothing is assigned. When write, set to "0".
(b7-b4)
When read, its content is "0".
HPTRG1
HPTRG0
0
0
page 244 of 402
Address
After reset
03D2h
Bit name
Simultaneous sample sweep mode or
delayed trigger mode 0,1
Delayed trigger mode 0, 1
Refer to Table 15.1.8.2 Trigger Select
Bit Setting in Delayed Trigger Mode 1
Refer to Table 15.1.8.2 Trigger Select
Bit Setting in Delayed Trigger Mode 1
Trigger
AD
TRG
15. A/D Converter
00h
Function
RW
RW
RW
RW
RW
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